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ARM: dts: apq8064: add support to gsbi1 uart

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This patch adds support to gsbi1 uart and its pinctrls nodes.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Srinivas Kandagatla
2016-04-12 10:33:51 +01:00
committed by Andy Gross
parent 67b5ad57df
commit 12861674c9
2 changed files with 24 additions and 0 deletions
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14
arch/arm/boot/dts/qcom-apq8064-pins.dtsi
View File

@@ -39,6 +39,20 @@
}; };
}; };
gsbi1_uart_2pins: gsbi1_uart_2pins {
mux {
pins = "gpio18", "gpio19";
function = "gsbi1";
};
};
gsbi1_uart_4pins: gsbi1_uart_4pins {
mux {
pins = "gpio18", "gpio19", "gpio20", "gpio21";
function = "gsbi1";
};
};
i2c2_pins: i2c2 { i2c2_pins: i2c2 {
mux { mux {
pins = "gpio24", "gpio25"; pins = "gpio24", "gpio25";

10
arch/arm/boot/dts/qcom-apq8064.dtsi
View File

@@ -319,6 +319,16 @@
syscon-tcsr = <&tcsr>; syscon-tcsr = <&tcsr>;
gsbi1_serial: serial@12450000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12450000 0x100>,
<0x12400000 0x03>;
interrupts = <0 193 0x0>;
clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
gsbi1_i2c: i2c@12460000 { gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1"; compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c1_pins>; pinctrl-0 = <&i2c1_pins>;