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s390/disassembler: add instructions

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Add more instructions to the kernel disassembler.

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
This commit is contained in:
Heiko Carstens
2021-02-15 20:57:53 +01:00
parent b3bc7980f4
commit 196e3c6ad1
2 changed files with 20 additions and 0 deletions
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2
arch/s390/kernel/dis.c
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@@ -312,10 +312,12 @@ static const unsigned char formats[][6] = {
[INSTR_VRR_VV] = { V_8, V_12, 0, 0, 0, 0 }, [INSTR_VRR_VV] = { V_8, V_12, 0, 0, 0, 0 },
[INSTR_VRR_VV0U] = { V_8, V_12, U4_32, 0, 0, 0 }, [INSTR_VRR_VV0U] = { V_8, V_12, U4_32, 0, 0, 0 },
[INSTR_VRR_VV0U0U] = { V_8, V_12, U4_32, U4_24, 0, 0 }, [INSTR_VRR_VV0U0U] = { V_8, V_12, U4_32, U4_24, 0, 0 },
[INSTR_VRR_VV0U2] = { V_8, V_12, U4_24, 0, 0, 0 },
[INSTR_VRR_VV0UU2] = { V_8, V_12, U4_32, U4_28, 0, 0 }, [INSTR_VRR_VV0UU2] = { V_8, V_12, U4_32, U4_28, 0, 0 },
[INSTR_VRR_VV0UUU] = { V_8, V_12, U4_32, U4_28, U4_24, 0 }, [INSTR_VRR_VV0UUU] = { V_8, V_12, U4_32, U4_28, U4_24, 0 },
[INSTR_VRR_VVV] = { V_8, V_12, V_16, 0, 0, 0 }, [INSTR_VRR_VVV] = { V_8, V_12, V_16, 0, 0, 0 },
[INSTR_VRR_VVV0U] = { V_8, V_12, V_16, U4_32, 0, 0 }, [INSTR_VRR_VVV0U] = { V_8, V_12, V_16, U4_32, 0, 0 },
[INSTR_VRR_VVV0U0] = { V_8, V_12, V_16, U4_24, 0, 0 },
[INSTR_VRR_VVV0U0U] = { V_8, V_12, V_16, U4_32, U4_24, 0 }, [INSTR_VRR_VVV0U0U] = { V_8, V_12, V_16, U4_32, U4_24, 0 },
[INSTR_VRR_VVV0UU] = { V_8, V_12, V_16, U4_32, U4_28, 0 }, [INSTR_VRR_VVV0UU] = { V_8, V_12, V_16, U4_32, U4_28, 0 },
[INSTR_VRR_VVV0UUU] = { V_8, V_12, V_16, U4_32, U4_28, U4_24 }, [INSTR_VRR_VVV0UUU] = { V_8, V_12, V_16, U4_32, U4_28, U4_24 },

18
arch/s390/tools/opcodes.txt
View File

@@ -189,6 +189,8 @@ ad stosm SI_URD
ae sigp RS_RRRD ae sigp RS_RRRD
af mc SI_URD af mc SI_URD
b1 lra RX_RRRD b1 lra RX_RRRD
b200 lbear S_RD
b201 stbear S_RD
b202 stidp S_RD b202 stidp S_RD
b204 sck S_RD b204 sck S_RD
b205 stck S_RD b205 stck S_RD
@@ -523,6 +525,7 @@ b931 clgfr RRE_RR
b938 sortl RRE_RR b938 sortl RRE_RR
b939 dfltcc RRF_R0RR2 b939 dfltcc RRF_R0RR2
b93a kdsa RRE_RR b93a kdsa RRE_RR
b93b nnpa RRE_00
b93c ppno RRE_RR b93c ppno RRE_RR
b93e kimd RRE_RR b93e kimd RRE_RR
b93f klmd RRE_RR b93f klmd RRE_RR
@@ -562,6 +565,7 @@ b987 dlgr RRE_RR
b988 alcgr RRE_RR b988 alcgr RRE_RR
b989 slbgr RRE_RR b989 slbgr RRE_RR
b98a cspg RRE_RR b98a cspg RRE_RR
b98b rdp RRF_RURR2
b98d epsw RRE_RR b98d epsw RRE_RR
b98e idte RRF_RURR2 b98e idte RRF_RURR2
b98f crdte RRF_RURR2 b98f crdte RRF_RURR2
@@ -876,19 +880,32 @@ e63d vstrl VSI_URDV
e63f vstrlr VRS_RRDV e63f vstrlr VRS_RRDV
e649 vlip VRI_V0UU2 e649 vlip VRI_V0UU2
e650 vcvb VRR_RV0UU e650 vcvb VRR_RV0UU
e651 vclzdp VRR_VV0U2
e652 vcvbg VRR_RV0UU e652 vcvbg VRR_RV0UU
e654 vupkzh VRR_VV0U2
e655 vcnf VRR_VV0UU2
e656 vclfnh VRR_VV0UU2
e658 vcvd VRI_VR0UU e658 vcvd VRI_VR0UU
e659 vsrp VRI_VVUUU2 e659 vsrp VRI_VVUUU2
e65a vcvdg VRI_VR0UU e65a vcvdg VRI_VR0UU
e65b vpsop VRI_VVUUU2 e65b vpsop VRI_VVUUU2
e65c vupkzl VRR_VV0U2
e65d vcfn VRR_VV0UU2
e65e vclfnl VRR_VV0UU2
e65f vtp VRR_0V e65f vtp VRR_0V
e670 vpkzr VRI_VVV0UU2
e671 vap VRI_VVV0UU2 e671 vap VRI_VVV0UU2
e672 vsrpr VRI_VVV0UU2
e673 vsp VRI_VVV0UU2 e673 vsp VRI_VVV0UU2
e674 vschp VRR_VVV0U0U
e675 vcrnf VRR_VVV0UU
e677 vcp VRR_0VV0U e677 vcp VRR_0VV0U
e678 vmp VRI_VVV0UU2 e678 vmp VRI_VVV0UU2
e679 vmsp VRI_VVV0UU2 e679 vmsp VRI_VVV0UU2
e67a vdp VRI_VVV0UU2 e67a vdp VRI_VVV0UU2
e67b vrp VRI_VVV0UU2 e67b vrp VRI_VVV0UU2
e67c vscshp VRR_VVV
e67d vcsph VRR_VVV0U0
e67e vsdp VRI_VVV0UU2 e67e vsdp VRI_VVV0UU2
e700 vleb VRX_VRRDU e700 vleb VRX_VRRDU
e701 vleh VRX_VRRDU e701 vleh VRX_VRRDU
@@ -1081,6 +1098,7 @@ eb61 stric RSY_RDRU
eb62 mric RSY_RDRU eb62 mric RSY_RDRU
eb6a asi SIY_IRD eb6a asi SIY_IRD
eb6e alsi SIY_IRD eb6e alsi SIY_IRD
eb71 lpswey SIY_URD
eb7a agsi SIY_IRD eb7a agsi SIY_IRD
eb7e algsi SIY_IRD eb7e algsi SIY_IRD
eb80 icmh RSY_RURD eb80 icmh RSY_RURD