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crypto: qce - support zero length test vectors

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crypto test module passes zero length vectors as test input to sha-1 and
sha-256. To provide correct output for these vectors, hash zero support
has been added as in other crypto drivers.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Sivaprakash Murugesan
2020-06-22 11:45:04 +05:30
committed by Herbert Xu
parent 5c3a8a661e
commit 8ac1b9ccbf
3 changed files with 21 additions and 1 deletions
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2
drivers/crypto/Kconfig
View File

@@ -624,6 +624,8 @@ config CRYPTO_DEV_QCE_SKCIPHER
config CRYPTO_DEV_QCE_SHA config CRYPTO_DEV_QCE_SHA
bool bool
depends on CRYPTO_DEV_QCE depends on CRYPTO_DEV_QCE
select CRYPTO_SHA1
select CRYPTO_SHA256
choice choice
prompt "Algorithms enabled for QCE acceleration" prompt "Algorithms enabled for QCE acceleration"

2
drivers/crypto/qce/common.h
View File

@@ -87,6 +87,8 @@ struct qce_alg_template {
struct ahash_alg ahash; struct ahash_alg ahash;
} alg; } alg;
struct qce_device *qce; struct qce_device *qce;
const u8 *hash_zero;
const u32 digest_size;
}; };
void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len); void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);

18
drivers/crypto/qce/sha.c
View File

@@ -305,8 +305,12 @@ static int qce_ahash_final(struct ahash_request *req)
struct qce_alg_template *tmpl = to_ahash_tmpl(req->base.tfm); struct qce_alg_template *tmpl = to_ahash_tmpl(req->base.tfm);
struct qce_device *qce = tmpl->qce; struct qce_device *qce = tmpl->qce;
if (!rctx->buflen) if (!rctx->buflen) {
if (tmpl->hash_zero)
memcpy(req->result, tmpl->hash_zero,
tmpl->alg.ahash.halg.digestsize);
return 0; return 0;
}
rctx->last_blk = true; rctx->last_blk = true;
@@ -338,6 +342,13 @@ static int qce_ahash_digest(struct ahash_request *req)
rctx->first_blk = true; rctx->first_blk = true;
rctx->last_blk = true; rctx->last_blk = true;
if (!rctx->nbytes_orig) {
if (tmpl->hash_zero)
memcpy(req->result, tmpl->hash_zero,
tmpl->alg.ahash.halg.digestsize);
return 0;
}
return qce->async_req_enqueue(tmpl->qce, &req->base); return qce->async_req_enqueue(tmpl->qce, &req->base);
} }
@@ -490,6 +501,11 @@ static int qce_ahash_register_one(const struct qce_ahash_def *def,
alg->halg.digestsize = def->digestsize; alg->halg.digestsize = def->digestsize;
alg->halg.statesize = def->statesize; alg->halg.statesize = def->statesize;
if (IS_SHA1(def->flags))
tmpl->hash_zero = sha1_zero_message_hash;
else if (IS_SHA256(def->flags))
tmpl->hash_zero = sha256_zero_message_hash;
base = &alg->halg.base; base = &alg->halg.base;
base->cra_blocksize = def->blocksize; base->cra_blocksize = def->blocksize;
base->cra_priority = 300; base->cra_priority = 300;