UPSTREAM: dt-bindings: mmc: mtk-sd: Add hs400 dly3 setting
Add hs400 dly3 setting for mtk-sd yaml Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210917124803.22871-2-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Bug: 234554003 Signed-off-by: Peng Zhou <Peng.Zhou@mediatek.com> Change-Id: I2738b6774108d3dc8a12291f879744fb92c2d25b (cherry picked from commit fb4708e6cb5c70a0dca5437640f1f85b9042256e)
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committed by
Carlos Llamas
parent
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commit
9a63e4dcc0
@@ -119,6 +119,18 @@ properties:
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If present, HS400 command responses are sampled on rising edges.
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If not present, HS400 command responses are sampled on falling edges.
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mediatek,hs400-ds-dly3:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Gear of the third delay line for DS for input data latch in data
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pad macro, there are 32 stages from 0 to 31.
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For different corner IC, the time is different about one step, it is
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about 100ps.
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The value is confirmed by doing scan and calibration to find a best
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value with corner IC and it is valid only for HS400 mode.
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minimum: 0
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maximum: 31
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mediatek,latch-ck:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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