cxl/pmem: Fix Documentation warning
Commit 06737cd0d2 ("cxl/core: Move pmem functionality") neglected to
add a DOC header for the new drivers/cxl/core/pmem.c file.
Reported-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huwei.com>
Link: https://lore.kernel.org/r/163072206163.2250120.11486436976516079516.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
@@ -40,7 +40,7 @@ CXL Core
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:doc: cxl core
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:doc: cxl core
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.. kernel-doc:: drivers/cxl/core/pmem.c
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.. kernel-doc:: drivers/cxl/core/pmem.c
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:internal:
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:doc: cxl pmem
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.. kernel-doc:: drivers/cxl/core/regs.c
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.. kernel-doc:: drivers/cxl/core/regs.c
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:internal:
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:internal:
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@@ -1,13 +1,25 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2020 Intel Corporation. */
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/* Copyright(c) 2020 Intel Corporation. */
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#include <linux/device.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <cxlmem.h>
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#include <cxlmem.h>
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#include <cxl.h>
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#include <cxl.h>
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#include "core.h"
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#include "core.h"
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/**
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* DOC: cxl pmem
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*
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* The core CXL PMEM infrastructure supports persistent memory
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* provisioning and serves as a bridge to the LIBNVDIMM subsystem. A CXL
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* 'bridge' device is added at the root of a CXL device topology if
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* platform firmware advertises at least one persistent memory capable
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* CXL window. That root-level bridge corresponds to a LIBNVDIMM 'bus'
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* device. Then for each cxl_memdev in the CXL device topology a bridge
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* device is added to host a LIBNVDIMM dimm object. When these bridges
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* are registered native LIBNVDIMM uapis are translated to CXL
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* operations, for example, namespace label access commands.
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*/
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static void cxl_nvdimm_bridge_release(struct device *dev)
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static void cxl_nvdimm_bridge_release(struct device *dev)
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{
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{
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struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
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struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
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@@ -85,6 +97,13 @@ static void unregister_nvb(void *_cxl_nvb)
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device_unregister(&cxl_nvb->dev);
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device_unregister(&cxl_nvb->dev);
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}
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}
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/**
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* devm_cxl_add_nvdimm_bridge() - add the root of a LIBNVDIMM topology
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* @host: platform firmware root device
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* @port: CXL port at the root of a CXL topology
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*
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* Return: bridge device that can host cxl_nvdimm objects
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*/
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struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
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struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
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struct cxl_port *port)
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struct cxl_port *port)
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{
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{
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@@ -173,6 +192,13 @@ static struct cxl_nvdimm *cxl_nvdimm_alloc(struct cxl_memdev *cxlmd)
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return cxl_nvd;
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return cxl_nvd;
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}
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}
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/**
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* devm_cxl_add_nvdimm() - add a bridge between a cxl_memdev and an nvdimm
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* @host: same host as @cxlmd
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* @cxlmd: cxl_memdev instance that will perform LIBNVDIMM operations
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*
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* Return: 0 on success negative error code on failure.
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*/
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int devm_cxl_add_nvdimm(struct device *host, struct cxl_memdev *cxlmd)
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int devm_cxl_add_nvdimm(struct device *host, struct cxl_memdev *cxlmd)
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{
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{
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struct cxl_nvdimm *cxl_nvd;
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struct cxl_nvdimm *cxl_nvd;
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