Merge 5.15.63 into android13-5.15-lts
Changes in 5.15.63
ALSA: info: Fix llseek return value when using callback
ALSA: hda/realtek: Add quirk for Clevo NS50PU, NS70PU
KVM: Unconditionally get a ref to /dev/kvm module when creating a VM
x86/mm: Use proper mask when setting PUD mapping
rds: add missing barrier to release_refill
locking/atomic: Make test_and_*_bit() ordered on failure
drm/nouveau: recognise GA103
drm/ttm: Fix dummy res NULL ptr deref bug
drm/amd/display: Check correct bounds for stream encoder instances for DCN303
ata: libata-eh: Add missing command name
mmc: pxamci: Fix another error handling path in pxamci_probe()
mmc: pxamci: Fix an error handling path in pxamci_probe()
mmc: meson-gx: Fix an error handling path in meson_mmc_probe()
btrfs: unset reloc control if transaction commit fails in prepare_to_relocate()
btrfs: reset RO counter on block group if we fail to relocate
btrfs: fix lost error handling when looking up extended ref on log replay
cifs: Fix memory leak on the deferred close
x86/kprobes: Fix JNG/JNLE emulation
tracing/perf: Fix double put of trace event when init fails
tracing/eprobes: Do not allow eprobes to use $stack, or % for regs
tracing/eprobes: Do not hardcode $comm as a string
tracing/eprobes: Have event probes be consistent with kprobes and uprobes
tracing/probes: Have kprobes and uprobes use $COMM too
tracing: Have filter accept "common_cpu" to be consistent
ALSA: usb-audio: More comprehensive mixer map for ASUS ROG Zenith II
dt-bindings: usb: mtk-xhci: Allow wakeup interrupt-names to be optional
can: ems_usb: fix clang's -Wunaligned-access warning
apparmor: fix quiet_denied for file rules
apparmor: fix absroot causing audited secids to begin with =
apparmor: Fix failed mount permission check error message
apparmor: fix aa_label_asxprint return check
apparmor: fix setting unconfined mode on a loaded profile
apparmor: fix overlapping attachment computation
apparmor: fix reference count leak in aa_pivotroot()
apparmor: Fix memleak in aa_simple_write_to_buffer()
Documentation: ACPI: EINJ: Fix obsolete example
NFSv4.1: Don't decrease the value of seq_nr_highest_sent
NFSv4.1: Handle NFS4ERR_DELAY replies to OP_SEQUENCE correctly
NFSv4: Fix races in the legacy idmapper upcall
NFSv4.1: RECLAIM_COMPLETE must handle EACCES
NFSv4/pnfs: Fix a use-after-free bug in open
BPF: Fix potential bad pointer dereference in bpf_sys_bpf()
bpf: Don't reinit map value in prealloc_lru_pop
bpf: Acquire map uref in .init_seq_private for array map iterator
bpf: Acquire map uref in .init_seq_private for hash map iterator
bpf: Acquire map uref in .init_seq_private for sock local storage map iterator
bpf: Acquire map uref in .init_seq_private for sock{map,hash} iterator
bpf: Check the validity of max_rdwr_access for sock local storage map iterator
can: mcp251x: Fix race condition on receive interrupt
can: j1939: j1939_session_destroy(): fix memory leak of skbs
net: atlantic: fix aq_vec index out of range error
m68k: coldfire/device.c: protect FLEXCAN blocks
sunrpc: fix expiry of auth creds
SUNRPC: Fix xdr_encode_bool()
SUNRPC: Reinitialise the backchannel request buffers before reuse
virtio_net: fix memory leak inside XPD_TX with mergeable
devlink: Fix use-after-free after a failed reload
net: phy: Warn about incorrect mdio_bus_phy_resume() state
net: bcmgenet: Indicate MAC is in charge of PHY PM
net: bgmac: Fix a BUG triggered by wrong bytes_compl
selftests: forwarding: Fix failing tests with old libnet
dt-bindings: arm: qcom: fix Alcatel OneTouch Idol 3 compatibles
pinctrl: nomadik: Fix refcount leak in nmk_pinctrl_dt_subnode_to_map
pinctrl: qcom: msm8916: Allow CAMSS GP clocks to be muxed
pinctrl: amd: Don't save/restore interrupt status and wake status bits
pinctrl: sunxi: Add I/O bias setting for H6 R-PIO
pinctrl: qcom: sm8250: Fix PDC map
Input: exc3000 - fix return value check of wait_for_completion_timeout
octeontx2-pf: Fix NIX_AF_TL3_TL2X_LINKX_CFG register configuration
octeontx2-af: Apply tx nibble fixup always
octeontx2-af: suppress external profile loading warning
octeontx2-af: Fix mcam entry resource leak
octeontx2-af: Fix key checking for source mac
ACPI: property: Return type of acpi_add_nondev_subnodes() should be bool
geneve: do not use RT_TOS for IPv6 flowlabel
mlx5: do not use RT_TOS for IPv6 flowlabel
ipv6: do not use RT_TOS for IPv6 flowlabel
plip: avoid rcu debug splat
vsock: Fix memory leak in vsock_connect()
vsock: Set socket state back to SS_UNCONNECTED in vsock_connect_timeout()
dt-bindings: gpio: zynq: Add missing compatible strings
dt-bindings: arm: qcom: fix Longcheer L8150 compatibles
dt-bindings: arm: qcom: fix MSM8916 MTP compatibles
dt-bindings: arm: qcom: fix MSM8994 boards compatibles
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
spi: dt-bindings: cadence: add missing 'required'
spi: dt-bindings: zynqmp-qspi: add missing 'required'
ceph: use correct index when encoding client supported features
tools/vm/slabinfo: use alphabetic order when two values are equal
ceph: don't leak snap_rwsem in handle_cap_grant
kbuild: dummy-tools: avoid tmpdir leak in dummy gcc
tools build: Switch to new openssl API for test-libcrypto
NTB: ntb_tool: uninitialized heap data in tool_fn_write()
nfp: ethtool: fix the display error of `ethtool -m DEVNAME`
xen/xenbus: fix return type in xenbus_file_read()
atm: idt77252: fix use-after-free bugs caused by tst_timer
geneve: fix TOS inheriting for ipv4
perf probe: Fix an error handling path in 'parse_perf_probe_command()'
perf parse-events: Fix segfault when event parser gets an error
perf tests: Fix Track with sched_switch test for hybrid case
dpaa2-eth: trace the allocated address instead of page struct
fs/ntfs3: Fix using uninitialized value n when calling indx_read
fs/ntfs3: Fix NULL deref in ntfs_update_mftmirr
fs/ntfs3: Don't clear upper bits accidentally in log_replay()
fs/ntfs3: Fix double free on remount
fs/ntfs3: Do not change mode if ntfs_set_ea failed
fs/ntfs3: Fix missing i_op in ntfs_read_mft
nios2: page fault et.al. are *not* restartable syscalls...
nios2: don't leave NULLs in sys_call_table[]
nios2: traced syscall does need to check the syscall number
nios2: fix syscall restart checks
nios2: restarts apply only to the first sigframe we build...
nios2: add force_successful_syscall_return()
iavf: Fix adminq error handling
iavf: Fix reset error handling
ASoC: SOF: debug: Fix potential buffer overflow by snprintf()
ASoC: tas2770: Set correct FSYNC polarity
ASoC: tas2770: Allow mono streams
ASoC: tas2770: Drop conflicting set_bias_level power setting
ASoC: tas2770: Fix handling of mute/unmute
ASoC: codec: tlv320aic32x4: fix mono playback via I2S
netfilter: nf_tables: use READ_ONCE and WRITE_ONCE for shared generation id access
fs/ntfs3: uninitialized variable in ntfs_set_acl_ex()
netfilter: nf_tables: disallow NFTA_SET_ELEM_KEY_END with NFT_SET_ELEM_INTERVAL_END flag
netfilter: nf_tables: possible module reference underflow in error path
netfilter: nf_tables: really skip inactive sets when allocating name
netfilter: nf_tables: validate NFTA_SET_ELEM_OBJREF based on NFT_SET_OBJECT flag
netfilter: nf_tables: NFTA_SET_ELEM_KEY_END requires concat and interval flags
netfilter: nf_tables: disallow NFT_SET_ELEM_CATCHALL and NFT_SET_ELEM_INTERVAL_END
netfilter: nf_tables: check NFT_SET_CONCAT flag if field_count is specified
powerpc/pci: Fix get_phb_number() locking
spi: meson-spicc: add local pow2 clock ops to preserve rate between messages
net/sunrpc: fix potential memory leaks in rpc_sysfs_xprt_state_change()
net: dsa: mv88e6060: prevent crash on an unused port
mlxsw: spectrum: Clear PTP configuration after unregistering the netdevice
net: moxa: pass pdev instead of ndev to DMA functions
net: fix potential refcount leak in ndisc_router_discovery()
net: dsa: microchip: ksz9477: fix fdb_dump last invalid entry
net: dsa: felix: fix ethtool 256-511 and 512-1023 TX packet counters
net: genl: fix error path memory leak in policy dumping
net: dsa: don't warn in dsa_port_set_state_now() when driver doesn't support it
net: dsa: sja1105: fix buffer overflow in sja1105_setup_devlink_regions()
ice: Ignore EEXIST when setting promisc mode
i2c: imx: Make sure to unregister adapter on remove()
regulator: pca9450: Remove restrictions for regulator-name
i40e: Fix to stop tx_timeout recovery if GLOBR fails
fec: Fix timer capture timing in `fec_ptp_enable_pps()`
stmmac: intel: Add a missing clk_disable_unprepare() call in intel_eth_pci_remove()
igb: Add lock to avoid data race
kbuild: fix the modules order between drivers and libs
gcc-plugins: Undefine LATENT_ENTROPY_PLUGIN when plugin disabled for a file
tracing/eprobes: Fix reading of string fields
drm/imx/dcss: get rid of HPD warning message
ASoC: SOF: Intel: hda: Define rom_status_reg in sof_intel_dsp_desc
ASoC: SOF: Intel: hda: Fix potential buffer overflow by snprintf()
drm/meson: Fix refcount bugs in meson_vpu_has_available_connectors()
drm/sun4i: dsi: Prevent underflow when computing packet sizes
net: qrtr: start MHI channel after endpoit creation
KVM: arm64: Treat PMCR_EL1.LC as RES1 on asymmetric systems
KVM: arm64: Reject 32bit user PSTATE on asymmetric systems
HID: multitouch: new device class fix Lenovo X12 trackpad sticky
PCI: Add ACS quirk for Broadcom BCM5750x NICs
platform/chrome: cros_ec_proto: don't show MKBP version if unsupported
usb: cdns3 fix use-after-free at workaround 2
usb: cdns3: fix random warning message when driver load
usb: gadget: uvc: calculate the number of request depending on framesize
usb: gadget: uvc: call uvc uvcg_warn on completed status instead of uvcg_info
PCI: aardvark: Fix reporting Slot capabilities on emulated bridge
irqchip/tegra: Fix overflow implicit truncation warnings
drm/meson: Fix overflow implicit truncation warnings
clk: ti: Stop using legacy clkctrl names for omap4 and 5
scsi: ufs: ufs-mediatek: Fix the timing of configuring device regulators
usb: host: ohci-ppc-of: Fix refcount leak bug
usb: renesas: Fix refcount leak bug
usb: dwc2: gadget: remove D+ pull-up while no vbus with usb-role-switch
vboxguest: Do not use devm for irq
clk: qcom: ipq8074: dont disable gcc_sleep_clk_src
uacce: Handle parent device removal or parent driver module rmmod
zram: do not lookup algorithm in backends table
clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure description
scsi: lpfc: Prevent buffer overflow crashes in debugfs with malformed user input
scsi: lpfc: Fix possible memory leak when failing to issue CMF WQE
gadgetfs: ep_io - wait until IRQ finishes
coresight: etm4x: avoid build failure with unrolled loops
habanalabs/gaudi: fix shift out of bounds
habanalabs/gaudi: mask constant value before cast
mmc: tmio: avoid glitches when resetting
pinctrl: intel: Check against matching data instead of ACPI companion
cxl: Fix a memory leak in an error handling path
PCI/ACPI: Guard ARM64-specific mcfg_quirks
um: add "noreboot" command line option for PANIC_TIMEOUT=-1 setups
dmaengine: dw-axi-dmac: do not print NULL LLI during error
dmaengine: dw-axi-dmac: ignore interrupt if no descriptor
RDMA/rxe: Limit the number of calls to each tasklet
csky/kprobe: reclaim insn_slot on kprobe unregistration
selftests/kprobe: Do not test for GRP/ without event failures
dmaengine: sprd: Cleanup in .remove() after pm_runtime_get_sync() failed
openrisc: io: Define iounmap argument as volatile
phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks
md: Notify sysfs sync_completed in md_reap_sync_thread()
nvmet-tcp: fix lockdep complaint on nvmet_tcp_wq flush during queue teardown
drivers:md:fix a potential use-after-free bug
ext4: avoid remove directory when directory is corrupted
ext4: avoid resizing to a partial cluster size
lib/list_debug.c: Detect uninitialized lists
tty: serial: Fix refcount leak bug in ucc_uart.c
KVM: PPC: Book3S HV: Fix "rm_exit" entry in debugfs timings
vfio: Clear the caps->buf to NULL after free
mips: cavium-octeon: Fix missing of_node_put() in octeon2_usb_clocks_start
iommu/io-pgtable-arm-v7s: Add a quirk to allow pgtable PA up to 35bit
modules: Ensure natural alignment for .altinstructions and __bug_table sections
ASoC: rsnd: care default case on rsnd_ssiu_busif_err_irq_ctrl()
riscv: dts: sifive: Add fu740 topology information
riscv: dts: canaan: Add k210 topology information
riscv: mmap with PROT_WRITE but no PROT_READ is invalid
RISC-V: Add fast call path of crash_kexec()
watchdog: export lockup_detector_reconfigure
powerpc/32: Set an IBAT covering up to _einittext during init
powerpc/32: Don't always pass -mcpu=powerpc to the compiler
ovl: warn if trusted xattr creation fails
powerpc/ioda/iommu/debugfs: Generate unique debugfs entries
ALSA: core: Add async signal helpers
ALSA: timer: Use deferred fasync helper
ALSA: control: Use deferred fasync helper
f2fs: fix to avoid use f2fs_bug_on() in f2fs_new_node_page()
f2fs: fix to do sanity check on segment type in build_sit_entries()
smb3: check xattr value length earlier
powerpc/64: Init jump labels before parse_early_param()
venus: pm_helpers: Fix warning in OPP during probe
video: fbdev: i740fb: Check the argument of i740_calc_vclk()
MIPS: tlbex: Explicitly compare _PAGE_NO_EXEC against 0
can: j1939: j1939_sk_queue_activate_next_locked(): replace WARN_ON_ONCE with netdev_warn_once()
scsi: ufs: ufs-mediatek: Fix build error and type mismatch
xfs: flush inodegc workqueue tasks before cancel
xfs: reserve quota for dir expansion when linking/unlinking files
xfs: reserve quota for target dir expansion when renaming files
xfs: remove infinite loop when reserving free block pool
xfs: always succeed at setting the reserve pool size
xfs: fix overfilling of reserve pool
xfs: fix soft lockup via spinning in filestream ag selection loop
xfs: revert "xfs: actually bump warning counts when we send warnings"
xfs: reject crazy array sizes being fed to XFS_IOC_GETBMAP*
Linux 5.15.63
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I7fda993b776ff638dff390f0ae7e3b26c45ca9e4
This commit is contained in:
Greg Kroah-Hartman
@@ -59,7 +59,7 @@ Like with atomic_t, the rule of thumb is:
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|||||||
- RMW operations that have a return value are fully ordered.
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- RMW operations that have a return value are fully ordered.
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||||||
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- RMW operations that are conditional are unordered on FAILURE,
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- RMW operations that are conditional are unordered on FAILURE,
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otherwise the above rules apply. In the case of test_and_{}_bit() operations,
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otherwise the above rules apply. In the case of test_and_set_bit_lock(),
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if the bit in memory is unchanged by the operation then it is deemed to have
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if the bit in memory is unchanged by the operation then it is deemed to have
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failed.
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failed.
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@@ -135,28 +135,34 @@ properties:
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- const: qcom,msm8974
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- const: qcom,msm8974
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- items:
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- items:
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- enum:
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- alcatel,idol347
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- const: qcom,msm8916-mtp/1
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- const: qcom,msm8916-mtp
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- const: qcom,msm8916-mtp
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- const: qcom,msm8916-mtp/1
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- const: qcom,msm8916
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- const: qcom,msm8916
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- items:
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- items:
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- enum:
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- enum:
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- longcheer,l8150
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- alcatel,idol347
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- samsung,a3u-eur
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- samsung,a3u-eur
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- samsung,a5u-eur
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- samsung,a5u-eur
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- const: qcom,msm8916
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- const: qcom,msm8916
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- items:
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- const: longcheer,l8150
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- const: qcom,msm8916-v1-qrd/9-v1
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- const: qcom,msm8916
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- items:
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- items:
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- enum:
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- enum:
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- sony,karin_windy
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- sony,karin_windy
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- const: qcom,apq8094
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- items:
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- enum:
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- sony,karin-row
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- sony,karin-row
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- sony,satsuki-row
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- sony,satsuki-row
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- sony,sumire-row
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- sony,sumire-row
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- sony,suzuran-row
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- sony,suzuran-row
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- qcom,msm8994
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- const: qcom,msm8994
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- const: qcom,apq8094
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- items:
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- items:
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- const: qcom,msm8996-mtp
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- const: qcom,msm8996-mtp
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@@ -22,16 +22,32 @@ properties:
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const: qcom,gcc-msm8996
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const: qcom,gcc-msm8996
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clocks:
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clocks:
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minItems: 3
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items:
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items:
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- description: XO source
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- description: XO source
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- description: Second XO source
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- description: Second XO source
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- description: Sleep clock source
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- description: Sleep clock source
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- description: PCIe 0 PIPE clock (optional)
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- description: PCIe 1 PIPE clock (optional)
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- description: PCIe 2 PIPE clock (optional)
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- description: USB3 PIPE clock (optional)
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- description: UFS RX symbol 0 clock (optional)
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- description: UFS RX symbol 1 clock (optional)
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- description: UFS TX symbol 0 clock (optional)
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clock-names:
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clock-names:
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minItems: 3
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items:
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items:
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- const: cxo
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- const: cxo
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- const: cxo2
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- const: cxo2
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- const: sleep_clk
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- const: sleep_clk
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- const: pcie_0_pipe_clk_src
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- const: pcie_1_pipe_clk_src
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- const: pcie_2_pipe_clk_src
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- const: usb3_phy_pipe_clk_src
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- const: ufs_rx_symbol_0_clk_src
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- const: ufs_rx_symbol_1_clk_src
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|
- const: ufs_tx_symbol_0_clk_src
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|
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'#clock-cells':
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'#clock-cells':
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const: 1
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const: 1
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@@ -11,7 +11,11 @@ maintainers:
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|
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properties:
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properties:
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compatible:
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compatible:
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const: xlnx,zynq-gpio-1.0
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enum:
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- xlnx,zynq-gpio-1.0
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|
- xlnx,zynqmp-gpio-1.0
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|
- xlnx,versal-gpio-1.0
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|
- xlnx,pmc-gpio-1.0
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||||||
|
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reg:
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reg:
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maxItems: 1
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maxItems: 1
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||||||
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|||||||
@@ -47,12 +47,6 @@ properties:
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description:
|
description:
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Properties for single LDO regulator.
|
Properties for single LDO regulator.
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|
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properties:
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regulator-name:
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pattern: "^LDO[1-5]$"
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description:
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should be "LDO1", ..., "LDO5"
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||||||
|
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||||||
unevaluatedProperties: false
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unevaluatedProperties: false
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|
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||||||
"^BUCK[1-6]$":
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"^BUCK[1-6]$":
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@@ -62,11 +56,6 @@ properties:
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Properties for single BUCK regulator.
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Properties for single BUCK regulator.
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properties:
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properties:
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regulator-name:
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pattern: "^BUCK[1-6]$"
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description:
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||||||
should be "BUCK1", ..., "BUCK6"
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||||||
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nxp,dvs-run-voltage:
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nxp,dvs-run-voltage:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 600000
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minimum: 600000
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|||||||
@@ -49,6 +49,13 @@ properties:
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enum: [ 0, 1 ]
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enum: [ 0, 1 ]
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default: 0
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default: 0
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|
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||||||
|
required:
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|
- compatible
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||||||
|
- reg
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||||||
|
- interrupts
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||||||
|
- clock-names
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||||||
|
- clocks
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||||||
|
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||||||
unevaluatedProperties: false
|
unevaluatedProperties: false
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||||||
|
|
||||||
examples:
|
examples:
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||||||
|
|||||||
@@ -30,6 +30,13 @@ properties:
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clocks:
|
clocks:
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maxItems: 2
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maxItems: 2
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||||||
|
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||||||
|
required:
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||||||
|
- compatible
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||||||
|
- reg
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||||||
|
- interrupts
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||||||
|
- clock-names
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||||||
|
- clocks
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||||||
|
|
||||||
unevaluatedProperties: false
|
unevaluatedProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
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||||||
|
|||||||
@@ -56,6 +56,7 @@ properties:
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|||||||
- description: optional, wakeup interrupt used to support runtime PM
|
- description: optional, wakeup interrupt used to support runtime PM
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||||||
|
|
||||||
interrupt-names:
|
interrupt-names:
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||||||
|
minItems: 1
|
||||||
items:
|
items:
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||||||
- const: host
|
- const: host
|
||||||
- const: wakeup
|
- const: wakeup
|
||||||
|
|||||||
@@ -168,7 +168,7 @@ An error injection example::
|
|||||||
0x00000008 Memory Correctable
|
0x00000008 Memory Correctable
|
||||||
0x00000010 Memory Uncorrectable non-fatal
|
0x00000010 Memory Uncorrectable non-fatal
|
||||||
# echo 0x12345000 > param1 # Set memory address for injection
|
# echo 0x12345000 > param1 # Set memory address for injection
|
||||||
# echo $((-1 << 12)) > param2 # Mask 0xfffffffffffff000 - anywhere in this page
|
# echo 0xfffffffffffff000 > param2 # Mask - anywhere in this page
|
||||||
# echo 0x8 > error_type # Choose correctable memory error
|
# echo 0x8 > error_type # Choose correctable memory error
|
||||||
# echo 1 > error_inject # Inject now
|
# echo 1 > error_inject # Inject now
|
||||||
|
|
||||||
|
|||||||
8
Makefile
8
Makefile
@@ -1,7 +1,7 @@
|
|||||||
# SPDX-License-Identifier: GPL-2.0
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
VERSION = 5
|
VERSION = 5
|
||||||
PATCHLEVEL = 15
|
PATCHLEVEL = 15
|
||||||
SUBLEVEL = 62
|
SUBLEVEL = 63
|
||||||
EXTRAVERSION =
|
EXTRAVERSION =
|
||||||
NAME = Trick or Treat
|
NAME = Trick or Treat
|
||||||
|
|
||||||
@@ -1218,13 +1218,11 @@ vmlinux-alldirs := $(sort $(vmlinux-dirs) Documentation \
|
|||||||
$(patsubst %/,%,$(filter %/, $(core-) \
|
$(patsubst %/,%,$(filter %/, $(core-) \
|
||||||
$(drivers-) $(libs-))))
|
$(drivers-) $(libs-))))
|
||||||
|
|
||||||
subdir-modorder := $(addsuffix modules.order,$(filter %/, \
|
|
||||||
$(core-y) $(core-m) $(libs-y) $(libs-m) \
|
|
||||||
$(drivers-y) $(drivers-m)))
|
|
||||||
|
|
||||||
build-dirs := $(vmlinux-dirs)
|
build-dirs := $(vmlinux-dirs)
|
||||||
clean-dirs := $(vmlinux-alldirs)
|
clean-dirs := $(vmlinux-alldirs)
|
||||||
|
|
||||||
|
subdir-modorder := $(addsuffix /modules.order, $(build-dirs))
|
||||||
|
|
||||||
# Externally visible symbols (used by link-vmlinux.sh)
|
# Externally visible symbols (used by link-vmlinux.sh)
|
||||||
KBUILD_VMLINUX_OBJS := $(head-y) $(patsubst %/,%/built-in.a, $(core-y))
|
KBUILD_VMLINUX_OBJS := $(head-y) $(patsubst %/,%/built-in.a, $(core-y))
|
||||||
KBUILD_VMLINUX_OBJS += $(addsuffix built-in.a, $(filter %/, $(libs-y)))
|
KBUILD_VMLINUX_OBJS += $(addsuffix built-in.a, $(filter %/, $(libs-y)))
|
||||||
|
|||||||
@@ -938,6 +938,10 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
|
|||||||
#define kvm_vcpu_has_pmu(vcpu) \
|
#define kvm_vcpu_has_pmu(vcpu) \
|
||||||
(test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features))
|
(test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features))
|
||||||
|
|
||||||
|
#define kvm_supports_32bit_el0() \
|
||||||
|
(system_supports_32bit_el0() && \
|
||||||
|
!static_branch_unlikely(&arm64_mismatched_32bit_el0))
|
||||||
|
|
||||||
int kvm_trng_call(struct kvm_vcpu *vcpu);
|
int kvm_trng_call(struct kvm_vcpu *vcpu);
|
||||||
#ifdef CONFIG_KVM
|
#ifdef CONFIG_KVM
|
||||||
extern phys_addr_t hyp_mem_base;
|
extern phys_addr_t hyp_mem_base;
|
||||||
|
|||||||
@@ -853,8 +853,7 @@ static bool vcpu_mode_is_bad_32bit(struct kvm_vcpu *vcpu)
|
|||||||
if (likely(!vcpu_mode_is_32bit(vcpu)))
|
if (likely(!vcpu_mode_is_32bit(vcpu)))
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
return !system_supports_32bit_el0() ||
|
return !kvm_supports_32bit_el0();
|
||||||
static_branch_unlikely(&arm64_mismatched_32bit_el0);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|||||||
@@ -242,7 +242,7 @@ static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
|||||||
u64 mode = (*(u64 *)valp) & PSR_AA32_MODE_MASK;
|
u64 mode = (*(u64 *)valp) & PSR_AA32_MODE_MASK;
|
||||||
switch (mode) {
|
switch (mode) {
|
||||||
case PSR_AA32_MODE_USR:
|
case PSR_AA32_MODE_USR:
|
||||||
if (!system_supports_32bit_el0())
|
if (!kvm_supports_32bit_el0())
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
break;
|
break;
|
||||||
case PSR_AA32_MODE_FIQ:
|
case PSR_AA32_MODE_FIQ:
|
||||||
|
|||||||
@@ -617,7 +617,7 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
|
|||||||
*/
|
*/
|
||||||
val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
|
val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
|
||||||
| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
|
| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
|
||||||
if (!system_supports_32bit_el0())
|
if (!kvm_supports_32bit_el0())
|
||||||
val |= ARMV8_PMU_PMCR_LC;
|
val |= ARMV8_PMU_PMCR_LC;
|
||||||
__vcpu_sys_reg(vcpu, r->reg) = val;
|
__vcpu_sys_reg(vcpu, r->reg) = val;
|
||||||
}
|
}
|
||||||
@@ -666,7 +666,7 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
|
|||||||
val = __vcpu_sys_reg(vcpu, PMCR_EL0);
|
val = __vcpu_sys_reg(vcpu, PMCR_EL0);
|
||||||
val &= ~ARMV8_PMU_PMCR_MASK;
|
val &= ~ARMV8_PMU_PMCR_MASK;
|
||||||
val |= p->regval & ARMV8_PMU_PMCR_MASK;
|
val |= p->regval & ARMV8_PMU_PMCR_MASK;
|
||||||
if (!system_supports_32bit_el0())
|
if (!kvm_supports_32bit_el0())
|
||||||
val |= ARMV8_PMU_PMCR_LC;
|
val |= ARMV8_PMU_PMCR_LC;
|
||||||
__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
|
__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
|
||||||
kvm_pmu_handle_pmcr(vcpu, val);
|
kvm_pmu_handle_pmcr(vcpu, val);
|
||||||
|
|||||||
@@ -124,6 +124,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
|
|||||||
|
|
||||||
void __kprobes arch_remove_kprobe(struct kprobe *p)
|
void __kprobes arch_remove_kprobe(struct kprobe *p)
|
||||||
{
|
{
|
||||||
|
if (p->ainsn.api.insn) {
|
||||||
|
free_insn_slot(p->ainsn.api.insn, 0);
|
||||||
|
p->ainsn.api.insn = NULL;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
|
static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
|
||||||
|
|||||||
@@ -581,7 +581,7 @@ static struct platform_device mcf_esdhc = {
|
|||||||
};
|
};
|
||||||
#endif /* MCFSDHC_BASE */
|
#endif /* MCFSDHC_BASE */
|
||||||
|
|
||||||
#if IS_ENABLED(CONFIG_CAN_FLEXCAN)
|
#ifdef MCFFLEXCAN_SIZE
|
||||||
|
|
||||||
#include <linux/can/platform/flexcan.h>
|
#include <linux/can/platform/flexcan.h>
|
||||||
|
|
||||||
@@ -620,7 +620,7 @@ static struct platform_device mcf_flexcan0 = {
|
|||||||
.resource = mcf5441x_flexcan0_resource,
|
.resource = mcf5441x_flexcan0_resource,
|
||||||
.dev.platform_data = &mcf5441x_flexcan_info,
|
.dev.platform_data = &mcf5441x_flexcan_info,
|
||||||
};
|
};
|
||||||
#endif /* IS_ENABLED(CONFIG_CAN_FLEXCAN) */
|
#endif /* MCFFLEXCAN_SIZE */
|
||||||
|
|
||||||
static struct platform_device *mcf_devices[] __initdata = {
|
static struct platform_device *mcf_devices[] __initdata = {
|
||||||
&mcf_uart,
|
&mcf_uart,
|
||||||
@@ -657,7 +657,7 @@ static struct platform_device *mcf_devices[] __initdata = {
|
|||||||
#ifdef MCFSDHC_BASE
|
#ifdef MCFSDHC_BASE
|
||||||
&mcf_esdhc,
|
&mcf_esdhc,
|
||||||
#endif
|
#endif
|
||||||
#if IS_ENABLED(CONFIG_CAN_FLEXCAN)
|
#ifdef MCFFLEXCAN_SIZE
|
||||||
&mcf_flexcan0,
|
&mcf_flexcan0,
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|||||||
@@ -86,11 +86,12 @@ static void octeon2_usb_clocks_start(struct device *dev)
|
|||||||
"refclk-frequency", &clock_rate);
|
"refclk-frequency", &clock_rate);
|
||||||
if (i) {
|
if (i) {
|
||||||
dev_err(dev, "No UCTL \"refclk-frequency\"\n");
|
dev_err(dev, "No UCTL \"refclk-frequency\"\n");
|
||||||
|
of_node_put(uctl_node);
|
||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
i = of_property_read_string(uctl_node,
|
i = of_property_read_string(uctl_node,
|
||||||
"refclk-type", &clock_type);
|
"refclk-type", &clock_type);
|
||||||
|
of_node_put(uctl_node);
|
||||||
if (!i && strcmp("crystal", clock_type) == 0)
|
if (!i && strcmp("crystal", clock_type) == 0)
|
||||||
is_crystal_clock = true;
|
is_crystal_clock = true;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -634,7 +634,7 @@ static __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cpu_has_rixi && !!_PAGE_NO_EXEC) {
|
if (cpu_has_rixi && _PAGE_NO_EXEC != 0) {
|
||||||
if (fill_includes_sw_bits) {
|
if (fill_includes_sw_bits) {
|
||||||
UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL));
|
UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL));
|
||||||
} else {
|
} else {
|
||||||
@@ -2573,7 +2573,7 @@ static void check_pabits(void)
|
|||||||
unsigned long entry;
|
unsigned long entry;
|
||||||
unsigned pabits, fillbits;
|
unsigned pabits, fillbits;
|
||||||
|
|
||||||
if (!cpu_has_rixi || !_PAGE_NO_EXEC) {
|
if (!cpu_has_rixi || _PAGE_NO_EXEC == 0) {
|
||||||
/*
|
/*
|
||||||
* We'll only be making use of the fact that we can rotate bits
|
* We'll only be making use of the fact that we can rotate bits
|
||||||
* into the fill if the CPU supports RIXI, so don't bother
|
* into the fill if the CPU supports RIXI, so don't bother
|
||||||
|
|||||||
@@ -50,7 +50,8 @@
|
|||||||
stw r13, PT_R13(sp)
|
stw r13, PT_R13(sp)
|
||||||
stw r14, PT_R14(sp)
|
stw r14, PT_R14(sp)
|
||||||
stw r15, PT_R15(sp)
|
stw r15, PT_R15(sp)
|
||||||
stw r2, PT_ORIG_R2(sp)
|
movi r24, -1
|
||||||
|
stw r24, PT_ORIG_R2(sp)
|
||||||
stw r7, PT_ORIG_R7(sp)
|
stw r7, PT_ORIG_R7(sp)
|
||||||
|
|
||||||
stw ra, PT_RA(sp)
|
stw ra, PT_RA(sp)
|
||||||
|
|||||||
@@ -74,6 +74,8 @@ extern void show_regs(struct pt_regs *);
|
|||||||
((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE)\
|
((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE)\
|
||||||
- 1)
|
- 1)
|
||||||
|
|
||||||
|
#define force_successful_syscall_return() (current_pt_regs()->orig_r2 = -1)
|
||||||
|
|
||||||
int do_syscall_trace_enter(void);
|
int do_syscall_trace_enter(void);
|
||||||
void do_syscall_trace_exit(void);
|
void do_syscall_trace_exit(void);
|
||||||
#endif /* __ASSEMBLY__ */
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|||||||
@@ -185,6 +185,7 @@ ENTRY(handle_system_call)
|
|||||||
ldw r5, PT_R5(sp)
|
ldw r5, PT_R5(sp)
|
||||||
|
|
||||||
local_restart:
|
local_restart:
|
||||||
|
stw r2, PT_ORIG_R2(sp)
|
||||||
/* Check that the requested system call is within limits */
|
/* Check that the requested system call is within limits */
|
||||||
movui r1, __NR_syscalls
|
movui r1, __NR_syscalls
|
||||||
bgeu r2, r1, ret_invsyscall
|
bgeu r2, r1, ret_invsyscall
|
||||||
@@ -192,7 +193,6 @@ local_restart:
|
|||||||
movhi r11, %hiadj(sys_call_table)
|
movhi r11, %hiadj(sys_call_table)
|
||||||
add r1, r1, r11
|
add r1, r1, r11
|
||||||
ldw r1, %lo(sys_call_table)(r1)
|
ldw r1, %lo(sys_call_table)(r1)
|
||||||
beq r1, r0, ret_invsyscall
|
|
||||||
|
|
||||||
/* Check if we are being traced */
|
/* Check if we are being traced */
|
||||||
GET_THREAD_INFO r11
|
GET_THREAD_INFO r11
|
||||||
@@ -213,6 +213,9 @@ local_restart:
|
|||||||
translate_rc_and_ret:
|
translate_rc_and_ret:
|
||||||
movi r1, 0
|
movi r1, 0
|
||||||
bge r2, zero, 3f
|
bge r2, zero, 3f
|
||||||
|
ldw r1, PT_ORIG_R2(sp)
|
||||||
|
addi r1, r1, 1
|
||||||
|
beq r1, zero, 3f
|
||||||
sub r2, zero, r2
|
sub r2, zero, r2
|
||||||
movi r1, 1
|
movi r1, 1
|
||||||
3:
|
3:
|
||||||
@@ -255,9 +258,9 @@ traced_system_call:
|
|||||||
ldw r6, PT_R6(sp)
|
ldw r6, PT_R6(sp)
|
||||||
ldw r7, PT_R7(sp)
|
ldw r7, PT_R7(sp)
|
||||||
|
|
||||||
/* Fetch the syscall function, we don't need to check the boundaries
|
/* Fetch the syscall function. */
|
||||||
* since this is already done.
|
movui r1, __NR_syscalls
|
||||||
*/
|
bgeu r2, r1, traced_invsyscall
|
||||||
slli r1, r2, 2
|
slli r1, r2, 2
|
||||||
movhi r11,%hiadj(sys_call_table)
|
movhi r11,%hiadj(sys_call_table)
|
||||||
add r1, r1, r11
|
add r1, r1, r11
|
||||||
@@ -276,6 +279,9 @@ traced_system_call:
|
|||||||
translate_rc_and_ret2:
|
translate_rc_and_ret2:
|
||||||
movi r1, 0
|
movi r1, 0
|
||||||
bge r2, zero, 4f
|
bge r2, zero, 4f
|
||||||
|
ldw r1, PT_ORIG_R2(sp)
|
||||||
|
addi r1, r1, 1
|
||||||
|
beq r1, zero, 4f
|
||||||
sub r2, zero, r2
|
sub r2, zero, r2
|
||||||
movi r1, 1
|
movi r1, 1
|
||||||
4:
|
4:
|
||||||
@@ -287,6 +293,11 @@ end_translate_rc_and_ret2:
|
|||||||
RESTORE_SWITCH_STACK
|
RESTORE_SWITCH_STACK
|
||||||
br ret_from_exception
|
br ret_from_exception
|
||||||
|
|
||||||
|
/* If the syscall number was invalid return ENOSYS */
|
||||||
|
traced_invsyscall:
|
||||||
|
movi r2, -ENOSYS
|
||||||
|
br translate_rc_and_ret2
|
||||||
|
|
||||||
Luser_return:
|
Luser_return:
|
||||||
GET_THREAD_INFO r11 /* get thread_info pointer */
|
GET_THREAD_INFO r11 /* get thread_info pointer */
|
||||||
ldw r10, TI_FLAGS(r11) /* get thread_info->flags */
|
ldw r10, TI_FLAGS(r11) /* get thread_info->flags */
|
||||||
@@ -336,9 +347,6 @@ external_interrupt:
|
|||||||
/* skip if no interrupt is pending */
|
/* skip if no interrupt is pending */
|
||||||
beq r12, r0, ret_from_interrupt
|
beq r12, r0, ret_from_interrupt
|
||||||
|
|
||||||
movi r24, -1
|
|
||||||
stw r24, PT_ORIG_R2(sp)
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Process an external hardware interrupt.
|
* Process an external hardware interrupt.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -242,7 +242,7 @@ static int do_signal(struct pt_regs *regs)
|
|||||||
/*
|
/*
|
||||||
* If we were from a system call, check for system call restarting...
|
* If we were from a system call, check for system call restarting...
|
||||||
*/
|
*/
|
||||||
if (regs->orig_r2 >= 0) {
|
if (regs->orig_r2 >= 0 && regs->r1) {
|
||||||
continue_addr = regs->ea;
|
continue_addr = regs->ea;
|
||||||
restart_addr = continue_addr - 4;
|
restart_addr = continue_addr - 4;
|
||||||
retval = regs->r2;
|
retval = regs->r2;
|
||||||
@@ -264,6 +264,7 @@ static int do_signal(struct pt_regs *regs)
|
|||||||
regs->ea = restart_addr;
|
regs->ea = restart_addr;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
regs->orig_r2 = -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (get_signal(&ksig)) {
|
if (get_signal(&ksig)) {
|
||||||
|
|||||||
@@ -13,5 +13,6 @@
|
|||||||
#define __SYSCALL(nr, call) [nr] = (call),
|
#define __SYSCALL(nr, call) [nr] = (call),
|
||||||
|
|
||||||
void *sys_call_table[__NR_syscalls] = {
|
void *sys_call_table[__NR_syscalls] = {
|
||||||
|
[0 ... __NR_syscalls-1] = sys_ni_syscall,
|
||||||
#include <asm/unistd.h>
|
#include <asm/unistd.h>
|
||||||
};
|
};
|
||||||
|
|||||||
@@ -31,7 +31,7 @@
|
|||||||
void __iomem *ioremap(phys_addr_t offset, unsigned long size);
|
void __iomem *ioremap(phys_addr_t offset, unsigned long size);
|
||||||
|
|
||||||
#define iounmap iounmap
|
#define iounmap iounmap
|
||||||
extern void iounmap(void __iomem *addr);
|
extern void iounmap(volatile void __iomem *addr);
|
||||||
|
|
||||||
#include <asm-generic/io.h>
|
#include <asm-generic/io.h>
|
||||||
|
|
||||||
|
|||||||
@@ -77,7 +77,7 @@ void __iomem *__ref ioremap(phys_addr_t addr, unsigned long size)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ioremap);
|
EXPORT_SYMBOL(ioremap);
|
||||||
|
|
||||||
void iounmap(void __iomem *addr)
|
void iounmap(volatile void __iomem *addr)
|
||||||
{
|
{
|
||||||
/* If the page is from the fixmap pool then we just clear out
|
/* If the page is from the fixmap pool then we just clear out
|
||||||
* the fixmap mapping.
|
* the fixmap mapping.
|
||||||
|
|||||||
@@ -17,23 +17,6 @@ HAS_BIARCH := $(call cc-option-yn, -m32)
|
|||||||
# Set default 32 bits cross compilers for vdso and boot wrapper
|
# Set default 32 bits cross compilers for vdso and boot wrapper
|
||||||
CROSS32_COMPILE ?=
|
CROSS32_COMPILE ?=
|
||||||
|
|
||||||
ifeq ($(HAS_BIARCH),y)
|
|
||||||
ifeq ($(CROSS32_COMPILE),)
|
|
||||||
ifdef CONFIG_PPC32
|
|
||||||
# These options will be overridden by any -mcpu option that the CPU
|
|
||||||
# or platform code sets later on the command line, but they are needed
|
|
||||||
# to set a sane 32-bit cpu target for the 64-bit cross compiler which
|
|
||||||
# may default to the wrong ISA.
|
|
||||||
KBUILD_CFLAGS += -mcpu=powerpc
|
|
||||||
KBUILD_AFLAGS += -mcpu=powerpc
|
|
||||||
endif
|
|
||||||
endif
|
|
||||||
endif
|
|
||||||
|
|
||||||
ifdef CONFIG_PPC_BOOK3S_32
|
|
||||||
KBUILD_CFLAGS += -mcpu=powerpc
|
|
||||||
endif
|
|
||||||
|
|
||||||
# If we're on a ppc/ppc64/ppc64le machine use that defconfig, otherwise just use
|
# If we're on a ppc/ppc64/ppc64le machine use that defconfig, otherwise just use
|
||||||
# ppc64_defconfig because we have nothing better to go on.
|
# ppc64_defconfig because we have nothing better to go on.
|
||||||
uname := $(shell uname -m)
|
uname := $(shell uname -m)
|
||||||
@@ -185,6 +168,7 @@ endif
|
|||||||
endif
|
endif
|
||||||
|
|
||||||
CFLAGS-$(CONFIG_TARGET_CPU_BOOL) += $(call cc-option,-mcpu=$(CONFIG_TARGET_CPU))
|
CFLAGS-$(CONFIG_TARGET_CPU_BOOL) += $(call cc-option,-mcpu=$(CONFIG_TARGET_CPU))
|
||||||
|
AFLAGS-$(CONFIG_TARGET_CPU_BOOL) += $(call cc-option,-mcpu=$(CONFIG_TARGET_CPU))
|
||||||
|
|
||||||
# Altivec option not allowed with e500mc64 in GCC.
|
# Altivec option not allowed with e500mc64 in GCC.
|
||||||
ifdef CONFIG_ALTIVEC
|
ifdef CONFIG_ALTIVEC
|
||||||
@@ -195,14 +179,6 @@ endif
|
|||||||
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
|
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
|
||||||
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
|
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
|
||||||
|
|
||||||
ifdef CONFIG_PPC32
|
|
||||||
ifdef CONFIG_PPC_E500MC
|
|
||||||
CFLAGS-y += $(call cc-option,-mcpu=e500mc,-mcpu=powerpc)
|
|
||||||
else
|
|
||||||
CFLAGS-$(CONFIG_E500) += $(call cc-option,-mcpu=8540 -msoft-float,-mcpu=powerpc)
|
|
||||||
endif
|
|
||||||
endif
|
|
||||||
|
|
||||||
asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
|
asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1)
|
||||||
|
|
||||||
KBUILD_CPPFLAGS += -I $(srctree)/arch/$(ARCH) $(asinstr)
|
KBUILD_CPPFLAGS += -I $(srctree)/arch/$(ARCH) $(asinstr)
|
||||||
|
|||||||
@@ -421,14 +421,14 @@ InstructionTLBMiss:
|
|||||||
*/
|
*/
|
||||||
/* Get PTE (linux-style) and check access */
|
/* Get PTE (linux-style) and check access */
|
||||||
mfspr r3,SPRN_IMISS
|
mfspr r3,SPRN_IMISS
|
||||||
#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
|
#ifdef CONFIG_MODULES
|
||||||
lis r1, TASK_SIZE@h /* check if kernel address */
|
lis r1, TASK_SIZE@h /* check if kernel address */
|
||||||
cmplw 0,r1,r3
|
cmplw 0,r1,r3
|
||||||
#endif
|
#endif
|
||||||
mfspr r2, SPRN_SDR1
|
mfspr r2, SPRN_SDR1
|
||||||
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC | _PAGE_USER
|
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC | _PAGE_USER
|
||||||
rlwinm r2, r2, 28, 0xfffff000
|
rlwinm r2, r2, 28, 0xfffff000
|
||||||
#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
|
#ifdef CONFIG_MODULES
|
||||||
bgt- 112f
|
bgt- 112f
|
||||||
lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
|
lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
|
||||||
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
|
li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
|
||||||
|
|||||||
@@ -67,10 +67,6 @@ void set_pci_dma_ops(const struct dma_map_ops *dma_ops)
|
|||||||
pci_dma_ops = dma_ops;
|
pci_dma_ops = dma_ops;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* This function should run under locking protection, specifically
|
|
||||||
* hose_spinlock.
|
|
||||||
*/
|
|
||||||
static int get_phb_number(struct device_node *dn)
|
static int get_phb_number(struct device_node *dn)
|
||||||
{
|
{
|
||||||
int ret, phb_id = -1;
|
int ret, phb_id = -1;
|
||||||
@@ -107,15 +103,20 @@ static int get_phb_number(struct device_node *dn)
|
|||||||
if (!ret)
|
if (!ret)
|
||||||
phb_id = (int)(prop & (MAX_PHBS - 1));
|
phb_id = (int)(prop & (MAX_PHBS - 1));
|
||||||
|
|
||||||
|
spin_lock(&hose_spinlock);
|
||||||
|
|
||||||
/* We need to be sure to not use the same PHB number twice. */
|
/* We need to be sure to not use the same PHB number twice. */
|
||||||
if ((phb_id >= 0) && !test_and_set_bit(phb_id, phb_bitmap))
|
if ((phb_id >= 0) && !test_and_set_bit(phb_id, phb_bitmap))
|
||||||
return phb_id;
|
goto out_unlock;
|
||||||
|
|
||||||
/* If everything fails then fallback to dynamic PHB numbering. */
|
/* If everything fails then fallback to dynamic PHB numbering. */
|
||||||
phb_id = find_first_zero_bit(phb_bitmap, MAX_PHBS);
|
phb_id = find_first_zero_bit(phb_bitmap, MAX_PHBS);
|
||||||
BUG_ON(phb_id >= MAX_PHBS);
|
BUG_ON(phb_id >= MAX_PHBS);
|
||||||
set_bit(phb_id, phb_bitmap);
|
set_bit(phb_id, phb_bitmap);
|
||||||
|
|
||||||
|
out_unlock:
|
||||||
|
spin_unlock(&hose_spinlock);
|
||||||
|
|
||||||
return phb_id;
|
return phb_id;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -126,10 +127,13 @@ struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
|
|||||||
phb = zalloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
|
phb = zalloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
|
||||||
if (phb == NULL)
|
if (phb == NULL)
|
||||||
return NULL;
|
return NULL;
|
||||||
spin_lock(&hose_spinlock);
|
|
||||||
phb->global_number = get_phb_number(dev);
|
phb->global_number = get_phb_number(dev);
|
||||||
|
|
||||||
|
spin_lock(&hose_spinlock);
|
||||||
list_add_tail(&phb->list_node, &hose_list);
|
list_add_tail(&phb->list_node, &hose_list);
|
||||||
spin_unlock(&hose_spinlock);
|
spin_unlock(&hose_spinlock);
|
||||||
|
|
||||||
phb->dn = dev;
|
phb->dn = dev;
|
||||||
phb->is_dynamic = slab_is_available();
|
phb->is_dynamic = slab_is_available();
|
||||||
#ifdef CONFIG_PPC64
|
#ifdef CONFIG_PPC64
|
||||||
|
|||||||
@@ -751,6 +751,13 @@ void __init early_init_devtree(void *params)
|
|||||||
of_scan_flat_dt(early_init_dt_scan_root, NULL);
|
of_scan_flat_dt(early_init_dt_scan_root, NULL);
|
||||||
of_scan_flat_dt(early_init_dt_scan_memory_ppc, NULL);
|
of_scan_flat_dt(early_init_dt_scan_memory_ppc, NULL);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* As generic code authors expect to be able to use static keys
|
||||||
|
* in early_param() handlers, we initialize the static keys just
|
||||||
|
* before parsing early params (it's fine to call jump_label_init()
|
||||||
|
* more than once).
|
||||||
|
*/
|
||||||
|
jump_label_init();
|
||||||
parse_early_param();
|
parse_early_param();
|
||||||
|
|
||||||
/* make sure we've parsed cmdline for mem= before this */
|
/* make sure we've parsed cmdline for mem= before this */
|
||||||
|
|||||||
@@ -7,15 +7,6 @@
|
|||||||
#include <asm/ppc-opcode.h>
|
#include <asm/ppc-opcode.h>
|
||||||
|
|
||||||
#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
|
#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
|
||||||
static void __start_timing(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator *next)
|
|
||||||
{
|
|
||||||
struct kvmppc_vcore *vc = vcpu->arch.vcore;
|
|
||||||
u64 tb = mftb() - vc->tb_offset_applied;
|
|
||||||
|
|
||||||
vcpu->arch.cur_activity = next;
|
|
||||||
vcpu->arch.cur_tb_start = tb;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __accumulate_time(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator *next)
|
static void __accumulate_time(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator *next)
|
||||||
{
|
{
|
||||||
struct kvmppc_vcore *vc = vcpu->arch.vcore;
|
struct kvmppc_vcore *vc = vcpu->arch.vcore;
|
||||||
@@ -47,8 +38,8 @@ static void __accumulate_time(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator
|
|||||||
curr->seqcount = seq + 2;
|
curr->seqcount = seq + 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
#define start_timing(vcpu, next) __start_timing(vcpu, next)
|
#define start_timing(vcpu, next) __accumulate_time(vcpu, next)
|
||||||
#define end_timing(vcpu) __start_timing(vcpu, NULL)
|
#define end_timing(vcpu) __accumulate_time(vcpu, NULL)
|
||||||
#define accumulate_time(vcpu, next) __accumulate_time(vcpu, next)
|
#define accumulate_time(vcpu, next) __accumulate_time(vcpu, next)
|
||||||
#else
|
#else
|
||||||
#define start_timing(vcpu, next) do {} while (0)
|
#define start_timing(vcpu, next) do {} while (0)
|
||||||
|
|||||||
@@ -160,7 +160,10 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
|
|||||||
{
|
{
|
||||||
unsigned long done;
|
unsigned long done;
|
||||||
unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;
|
unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;
|
||||||
|
unsigned long size;
|
||||||
|
|
||||||
|
size = roundup_pow_of_two((unsigned long)_einittext - PAGE_OFFSET);
|
||||||
|
setibat(0, PAGE_OFFSET, 0, size, PAGE_KERNEL_X);
|
||||||
|
|
||||||
if (debug_pagealloc_enabled_or_kfence() || __map_without_bats) {
|
if (debug_pagealloc_enabled_or_kfence() || __map_without_bats) {
|
||||||
pr_debug_once("Read-Write memory mapped without BATs\n");
|
pr_debug_once("Read-Write memory mapped without BATs\n");
|
||||||
@@ -246,10 +249,9 @@ void mmu_mark_rodata_ro(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set up one of the I/D BAT (block address translation) register pairs.
|
* Set up one of the D BAT (block address translation) register pairs.
|
||||||
* The parameters are not checked; in particular size must be a power
|
* The parameters are not checked; in particular size must be a power
|
||||||
* of 2 between 128k and 256M.
|
* of 2 between 128k and 256M.
|
||||||
* On 603+, only set IBAT when _PAGE_EXEC is set
|
|
||||||
*/
|
*/
|
||||||
void __init setbat(int index, unsigned long virt, phys_addr_t phys,
|
void __init setbat(int index, unsigned long virt, phys_addr_t phys,
|
||||||
unsigned int size, pgprot_t prot)
|
unsigned int size, pgprot_t prot)
|
||||||
@@ -285,10 +287,6 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
|
|||||||
/* G bit must be zero in IBATs */
|
/* G bit must be zero in IBATs */
|
||||||
flags &= ~_PAGE_EXEC;
|
flags &= ~_PAGE_EXEC;
|
||||||
}
|
}
|
||||||
if (flags & _PAGE_EXEC)
|
|
||||||
bat[0] = bat[1];
|
|
||||||
else
|
|
||||||
bat[0].batu = bat[0].batl = 0;
|
|
||||||
|
|
||||||
bat_addrs[index].start = virt;
|
bat_addrs[index].start = virt;
|
||||||
bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1;
|
bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1;
|
||||||
|
|||||||
@@ -137,9 +137,9 @@ config GENERIC_CPU
|
|||||||
depends on PPC64 && CPU_LITTLE_ENDIAN
|
depends on PPC64 && CPU_LITTLE_ENDIAN
|
||||||
select ARCH_HAS_FAST_MULTIPLIER
|
select ARCH_HAS_FAST_MULTIPLIER
|
||||||
|
|
||||||
config GENERIC_CPU
|
config POWERPC_CPU
|
||||||
bool "Generic 32 bits powerpc"
|
bool "Generic 32 bits powerpc"
|
||||||
depends on PPC32 && !PPC_8xx
|
depends on PPC32 && !PPC_8xx && !PPC_85xx
|
||||||
|
|
||||||
config CELL_CPU
|
config CELL_CPU
|
||||||
bool "Cell Broadband Engine"
|
bool "Cell Broadband Engine"
|
||||||
@@ -193,11 +193,23 @@ config G4_CPU
|
|||||||
depends on PPC_BOOK3S_32
|
depends on PPC_BOOK3S_32
|
||||||
select ALTIVEC
|
select ALTIVEC
|
||||||
|
|
||||||
|
config E500_CPU
|
||||||
|
bool "e500 (8540)"
|
||||||
|
depends on PPC_85xx && !PPC_E500MC
|
||||||
|
|
||||||
|
config E500MC_CPU
|
||||||
|
bool "e500mc"
|
||||||
|
depends on PPC_85xx && PPC_E500MC
|
||||||
|
|
||||||
|
config TOOLCHAIN_DEFAULT_CPU
|
||||||
|
bool "Rely on the toolchain's implicit default CPU"
|
||||||
|
depends on PPC32
|
||||||
|
|
||||||
endchoice
|
endchoice
|
||||||
|
|
||||||
config TARGET_CPU_BOOL
|
config TARGET_CPU_BOOL
|
||||||
bool
|
bool
|
||||||
default !GENERIC_CPU
|
default !GENERIC_CPU && !TOOLCHAIN_DEFAULT_CPU
|
||||||
|
|
||||||
config TARGET_CPU
|
config TARGET_CPU
|
||||||
string
|
string
|
||||||
@@ -212,6 +224,9 @@ config TARGET_CPU
|
|||||||
default "e300c2" if E300C2_CPU
|
default "e300c2" if E300C2_CPU
|
||||||
default "e300c3" if E300C3_CPU
|
default "e300c3" if E300C3_CPU
|
||||||
default "G4" if G4_CPU
|
default "G4" if G4_CPU
|
||||||
|
default "8540" if E500_CPU
|
||||||
|
default "e500mc" if E500MC_CPU
|
||||||
|
default "powerpc" if POWERPC_CPU
|
||||||
|
|
||||||
config PPC_BOOK3S
|
config PPC_BOOK3S
|
||||||
def_bool y
|
def_bool y
|
||||||
|
|||||||
@@ -1618,6 +1618,7 @@ found:
|
|||||||
tbl->it_ops = &pnv_ioda1_iommu_ops;
|
tbl->it_ops = &pnv_ioda1_iommu_ops;
|
||||||
pe->table_group.tce32_start = tbl->it_offset << tbl->it_page_shift;
|
pe->table_group.tce32_start = tbl->it_offset << tbl->it_page_shift;
|
||||||
pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift;
|
pe->table_group.tce32_size = tbl->it_size << tbl->it_page_shift;
|
||||||
|
tbl->it_index = (phb->hose->global_number << 16) | pe->pe_number;
|
||||||
if (!iommu_init_table(tbl, phb->hose->node, 0, 0))
|
if (!iommu_init_table(tbl, phb->hose->node, 0, 0))
|
||||||
panic("Failed to initialize iommu table");
|
panic("Failed to initialize iommu table");
|
||||||
|
|
||||||
@@ -1788,6 +1789,7 @@ static long pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe)
|
|||||||
res_end = min(window_size, SZ_4G) >> tbl->it_page_shift;
|
res_end = min(window_size, SZ_4G) >> tbl->it_page_shift;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
tbl->it_index = (pe->phb->hose->global_number << 16) | pe->pe_number;
|
||||||
if (iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end))
|
if (iommu_init_table(tbl, pe->phb->hose->node, res_start, res_end))
|
||||||
rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl);
|
rc = pnv_pci_ioda2_set_window(&pe->table_group, 0, tbl);
|
||||||
else
|
else
|
||||||
|
|||||||
@@ -65,6 +65,18 @@
|
|||||||
compatible = "riscv,cpu-intc";
|
compatible = "riscv,cpu-intc";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cpu-map {
|
||||||
|
cluster0 {
|
||||||
|
core0 {
|
||||||
|
cpu = <&cpu0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
core1 {
|
||||||
|
cpu = <&cpu1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
sram: memory@80000000 {
|
sram: memory@80000000 {
|
||||||
|
|||||||
@@ -134,6 +134,30 @@
|
|||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cpu-map {
|
||||||
|
cluster0 {
|
||||||
|
core0 {
|
||||||
|
cpu = <&cpu0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
core1 {
|
||||||
|
cpu = <&cpu1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
core2 {
|
||||||
|
cpu = <&cpu2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
core3 {
|
||||||
|
cpu = <&cpu3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
core4 {
|
||||||
|
cpu = <&cpu4>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
soc {
|
soc {
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
|
|||||||
@@ -18,9 +18,8 @@ static long riscv_sys_mmap(unsigned long addr, unsigned long len,
|
|||||||
if (unlikely(offset & (~PAGE_MASK >> page_shift_offset)))
|
if (unlikely(offset & (~PAGE_MASK >> page_shift_offset)))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
if ((prot & PROT_WRITE) && (prot & PROT_EXEC))
|
if (unlikely((prot & PROT_WRITE) && !(prot & PROT_READ)))
|
||||||
if (unlikely(!(prot & PROT_READ)))
|
return -EINVAL;
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
return ksys_mmap_pgoff(addr, len, prot, flags, fd,
|
return ksys_mmap_pgoff(addr, len, prot, flags, fd,
|
||||||
offset >> (PAGE_SHIFT - page_shift_offset));
|
offset >> (PAGE_SHIFT - page_shift_offset));
|
||||||
|
|||||||
@@ -16,6 +16,7 @@
|
|||||||
#include <linux/mm.h>
|
#include <linux/mm.h>
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
|
#include <linux/kexec.h>
|
||||||
|
|
||||||
#include <asm/asm-prototypes.h>
|
#include <asm/asm-prototypes.h>
|
||||||
#include <asm/bug.h>
|
#include <asm/bug.h>
|
||||||
@@ -44,6 +45,9 @@ void die(struct pt_regs *regs, const char *str)
|
|||||||
|
|
||||||
ret = notify_die(DIE_OOPS, str, regs, 0, regs->cause, SIGSEGV);
|
ret = notify_die(DIE_OOPS, str, regs, 0, regs->cause, SIGSEGV);
|
||||||
|
|
||||||
|
if (regs && kexec_should_crash(current))
|
||||||
|
crash_kexec(regs);
|
||||||
|
|
||||||
bust_spinlocks(0);
|
bust_spinlocks(0);
|
||||||
add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
|
add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
|
||||||
spin_unlock_irq(&die_lock);
|
spin_unlock_irq(&die_lock);
|
||||||
|
|||||||
@@ -5,6 +5,7 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
|
#include <stdbool.h>
|
||||||
#include <unistd.h>
|
#include <unistd.h>
|
||||||
#include <sched.h>
|
#include <sched.h>
|
||||||
#include <errno.h>
|
#include <errno.h>
|
||||||
@@ -707,10 +708,24 @@ void halt_skas(void)
|
|||||||
UML_LONGJMP(&initial_jmpbuf, INIT_JMP_HALT);
|
UML_LONGJMP(&initial_jmpbuf, INIT_JMP_HALT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool noreboot;
|
||||||
|
|
||||||
|
static int __init noreboot_cmd_param(char *str, int *add)
|
||||||
|
{
|
||||||
|
noreboot = true;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
__uml_setup("noreboot", noreboot_cmd_param,
|
||||||
|
"noreboot\n"
|
||||||
|
" Rather than rebooting, exit always, akin to QEMU's -no-reboot option.\n"
|
||||||
|
" This is useful if you're using CONFIG_PANIC_TIMEOUT in order to catch\n"
|
||||||
|
" crashes in CI\n");
|
||||||
|
|
||||||
void reboot_skas(void)
|
void reboot_skas(void)
|
||||||
{
|
{
|
||||||
block_signals_trace();
|
block_signals_trace();
|
||||||
UML_LONGJMP(&initial_jmpbuf, INIT_JMP_REBOOT);
|
UML_LONGJMP(&initial_jmpbuf, noreboot ? INIT_JMP_HALT : INIT_JMP_REBOOT);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __switch_mm(struct mm_id *mm_idp)
|
void __switch_mm(struct mm_id *mm_idp)
|
||||||
|
|||||||
@@ -495,7 +495,7 @@ static void kprobe_emulate_jcc(struct kprobe *p, struct pt_regs *regs)
|
|||||||
match = ((regs->flags & X86_EFLAGS_SF) >> X86_EFLAGS_SF_BIT) ^
|
match = ((regs->flags & X86_EFLAGS_SF) >> X86_EFLAGS_SF_BIT) ^
|
||||||
((regs->flags & X86_EFLAGS_OF) >> X86_EFLAGS_OF_BIT);
|
((regs->flags & X86_EFLAGS_OF) >> X86_EFLAGS_OF_BIT);
|
||||||
if (p->ainsn.jcc.type >= 0xe)
|
if (p->ainsn.jcc.type >= 0xe)
|
||||||
match = match && (regs->flags & X86_EFLAGS_ZF);
|
match = match || (regs->flags & X86_EFLAGS_ZF);
|
||||||
}
|
}
|
||||||
__kprobe_emulate_jmp(p, regs, (match && !invert) || (!match && invert));
|
__kprobe_emulate_jmp(p, regs, (match && !invert) || (!match && invert));
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -646,7 +646,7 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
|
|||||||
pages++;
|
pages++;
|
||||||
spin_lock(&init_mm.page_table_lock);
|
spin_lock(&init_mm.page_table_lock);
|
||||||
|
|
||||||
prot = __pgprot(pgprot_val(prot) | __PAGE_KERNEL_LARGE);
|
prot = __pgprot(pgprot_val(prot) | _PAGE_PSE);
|
||||||
|
|
||||||
set_pte_init((pte_t *)pud,
|
set_pte_init((pte_t *)pud,
|
||||||
pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
|
pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
|
||||||
|
|||||||
@@ -41,6 +41,8 @@ struct mcfg_fixup {
|
|||||||
static struct mcfg_fixup mcfg_quirks[] = {
|
static struct mcfg_fixup mcfg_quirks[] = {
|
||||||
/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
|
/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARM64
|
||||||
|
|
||||||
#define AL_ECAM(table_id, rev, seg, ops) \
|
#define AL_ECAM(table_id, rev, seg, ops) \
|
||||||
{ "AMAZON", table_id, rev, seg, MCFG_BUS_ANY, ops }
|
{ "AMAZON", table_id, rev, seg, MCFG_BUS_ANY, ops }
|
||||||
|
|
||||||
@@ -169,6 +171,7 @@ static struct mcfg_fixup mcfg_quirks[] = {
|
|||||||
ALTRA_ECAM_QUIRK(1, 13),
|
ALTRA_ECAM_QUIRK(1, 13),
|
||||||
ALTRA_ECAM_QUIRK(1, 14),
|
ALTRA_ECAM_QUIRK(1, 14),
|
||||||
ALTRA_ECAM_QUIRK(1, 15),
|
ALTRA_ECAM_QUIRK(1, 15),
|
||||||
|
#endif /* ARM64 */
|
||||||
};
|
};
|
||||||
|
|
||||||
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
|
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
|
||||||
|
|||||||
@@ -155,10 +155,10 @@ static bool acpi_nondev_subnode_ok(acpi_handle scope,
|
|||||||
return acpi_nondev_subnode_data_ok(handle, link, list, parent);
|
return acpi_nondev_subnode_data_ok(handle, link, list, parent);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int acpi_add_nondev_subnodes(acpi_handle scope,
|
static bool acpi_add_nondev_subnodes(acpi_handle scope,
|
||||||
const union acpi_object *links,
|
const union acpi_object *links,
|
||||||
struct list_head *list,
|
struct list_head *list,
|
||||||
struct fwnode_handle *parent)
|
struct fwnode_handle *parent)
|
||||||
{
|
{
|
||||||
bool ret = false;
|
bool ret = false;
|
||||||
int i;
|
int i;
|
||||||
|
|||||||
@@ -2130,6 +2130,7 @@ const char *ata_get_cmd_descript(u8 command)
|
|||||||
{ ATA_CMD_WRITE_QUEUED_FUA_EXT, "WRITE DMA QUEUED FUA EXT" },
|
{ ATA_CMD_WRITE_QUEUED_FUA_EXT, "WRITE DMA QUEUED FUA EXT" },
|
||||||
{ ATA_CMD_FPDMA_READ, "READ FPDMA QUEUED" },
|
{ ATA_CMD_FPDMA_READ, "READ FPDMA QUEUED" },
|
||||||
{ ATA_CMD_FPDMA_WRITE, "WRITE FPDMA QUEUED" },
|
{ ATA_CMD_FPDMA_WRITE, "WRITE FPDMA QUEUED" },
|
||||||
|
{ ATA_CMD_NCQ_NON_DATA, "NCQ NON-DATA" },
|
||||||
{ ATA_CMD_FPDMA_SEND, "SEND FPDMA QUEUED" },
|
{ ATA_CMD_FPDMA_SEND, "SEND FPDMA QUEUED" },
|
||||||
{ ATA_CMD_FPDMA_RECV, "RECEIVE FPDMA QUEUED" },
|
{ ATA_CMD_FPDMA_RECV, "RECEIVE FPDMA QUEUED" },
|
||||||
{ ATA_CMD_PIO_READ, "READ SECTOR(S)" },
|
{ ATA_CMD_PIO_READ, "READ SECTOR(S)" },
|
||||||
|
|||||||
@@ -3752,6 +3752,7 @@ static void __exit idt77252_exit(void)
|
|||||||
card = idt77252_chain;
|
card = idt77252_chain;
|
||||||
dev = card->atmdev;
|
dev = card->atmdev;
|
||||||
idt77252_chain = card->next;
|
idt77252_chain = card->next;
|
||||||
|
del_timer_sync(&card->tst_timer);
|
||||||
|
|
||||||
if (dev->phy->stop)
|
if (dev->phy->stop)
|
||||||
dev->phy->stop(dev);
|
dev->phy->stop(dev);
|
||||||
|
|||||||
@@ -63,12 +63,6 @@ static int zcomp_strm_init(struct zcomp_strm *zstrm, struct zcomp *comp)
|
|||||||
|
|
||||||
bool zcomp_available_algorithm(const char *comp)
|
bool zcomp_available_algorithm(const char *comp)
|
||||||
{
|
{
|
||||||
int i;
|
|
||||||
|
|
||||||
i = sysfs_match_string(backends, comp);
|
|
||||||
if (i >= 0)
|
|
||||||
return true;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Crypto does not ignore a trailing new line symbol,
|
* Crypto does not ignore a trailing new line symbol,
|
||||||
* so make sure you don't supply a string containing
|
* so make sure you don't supply a string containing
|
||||||
@@ -217,6 +211,11 @@ struct zcomp *zcomp_create(const char *compress)
|
|||||||
struct zcomp *comp;
|
struct zcomp *comp;
|
||||||
int error;
|
int error;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Crypto API will execute /sbin/modprobe if the compression module
|
||||||
|
* is not loaded yet. We must do it here, otherwise we are about to
|
||||||
|
* call /sbin/modprobe under CPU hot-plug lock.
|
||||||
|
*/
|
||||||
if (!zcomp_available_algorithm(compress))
|
if (!zcomp_available_algorithm(compress))
|
||||||
return ERR_PTR(-EINVAL);
|
return ERR_PTR(-EINVAL);
|
||||||
|
|
||||||
|
|||||||
@@ -1420,7 +1420,7 @@ const struct clk_ops clk_alpha_pll_postdiv_fabia_ops = {
|
|||||||
EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_fabia_ops);
|
EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_fabia_ops);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* clk_lucid_pll_configure - configure the lucid pll
|
* clk_trion_pll_configure - configure the trion pll
|
||||||
*
|
*
|
||||||
* @pll: clk alpha pll
|
* @pll: clk alpha pll
|
||||||
* @regmap: register map
|
* @regmap: register map
|
||||||
|
|||||||
@@ -662,6 +662,7 @@ static struct clk_branch gcc_sleep_clk_src = {
|
|||||||
},
|
},
|
||||||
.num_parents = 1,
|
.num_parents = 1,
|
||||||
.ops = &clk_branch2_ops,
|
.ops = &clk_branch2_ops,
|
||||||
|
.flags = CLK_IS_CRITICAL,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|||||||
@@ -56,7 +56,7 @@ static const struct omap_clkctrl_bit_data omap4_aess_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_func_dmic_abe_gfclk_parents[] __initconst = {
|
static const char * const omap4_func_dmic_abe_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0018:26",
|
"abe-clkctrl:0018:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -76,7 +76,7 @@ static const struct omap_clkctrl_bit_data omap4_dmic_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_func_mcasp_abe_gfclk_parents[] __initconst = {
|
static const char * const omap4_func_mcasp_abe_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0020:26",
|
"abe-clkctrl:0020:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -89,7 +89,7 @@ static const struct omap_clkctrl_bit_data omap4_mcasp_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_func_mcbsp1_gfclk_parents[] __initconst = {
|
static const char * const omap4_func_mcbsp1_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0028:26",
|
"abe-clkctrl:0028:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -102,7 +102,7 @@ static const struct omap_clkctrl_bit_data omap4_mcbsp1_bit_data[] __initconst =
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_func_mcbsp2_gfclk_parents[] __initconst = {
|
static const char * const omap4_func_mcbsp2_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0030:26",
|
"abe-clkctrl:0030:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -115,7 +115,7 @@ static const struct omap_clkctrl_bit_data omap4_mcbsp2_bit_data[] __initconst =
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_func_mcbsp3_gfclk_parents[] __initconst = {
|
static const char * const omap4_func_mcbsp3_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0038:26",
|
"abe-clkctrl:0038:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -183,18 +183,18 @@ static const struct omap_clkctrl_bit_data omap4_timer8_bit_data[] __initconst =
|
|||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_abe_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_abe_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_L4_ABE_CLKCTRL, NULL, 0, "ocp_abe_iclk" },
|
{ OMAP4_L4_ABE_CLKCTRL, NULL, 0, "ocp_abe_iclk" },
|
||||||
{ OMAP4_AESS_CLKCTRL, omap4_aess_bit_data, CLKF_SW_SUP, "abe_cm:clk:0008:24" },
|
{ OMAP4_AESS_CLKCTRL, omap4_aess_bit_data, CLKF_SW_SUP, "abe-clkctrl:0008:24" },
|
||||||
{ OMAP4_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
|
{ OMAP4_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
|
||||||
{ OMAP4_DMIC_CLKCTRL, omap4_dmic_bit_data, CLKF_SW_SUP, "abe_cm:clk:0018:24" },
|
{ OMAP4_DMIC_CLKCTRL, omap4_dmic_bit_data, CLKF_SW_SUP, "abe-clkctrl:0018:24" },
|
||||||
{ OMAP4_MCASP_CLKCTRL, omap4_mcasp_bit_data, CLKF_SW_SUP, "abe_cm:clk:0020:24" },
|
{ OMAP4_MCASP_CLKCTRL, omap4_mcasp_bit_data, CLKF_SW_SUP, "abe-clkctrl:0020:24" },
|
||||||
{ OMAP4_MCBSP1_CLKCTRL, omap4_mcbsp1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0028:24" },
|
{ OMAP4_MCBSP1_CLKCTRL, omap4_mcbsp1_bit_data, CLKF_SW_SUP, "abe-clkctrl:0028:24" },
|
||||||
{ OMAP4_MCBSP2_CLKCTRL, omap4_mcbsp2_bit_data, CLKF_SW_SUP, "abe_cm:clk:0030:24" },
|
{ OMAP4_MCBSP2_CLKCTRL, omap4_mcbsp2_bit_data, CLKF_SW_SUP, "abe-clkctrl:0030:24" },
|
||||||
{ OMAP4_MCBSP3_CLKCTRL, omap4_mcbsp3_bit_data, CLKF_SW_SUP, "abe_cm:clk:0038:24" },
|
{ OMAP4_MCBSP3_CLKCTRL, omap4_mcbsp3_bit_data, CLKF_SW_SUP, "abe-clkctrl:0038:24" },
|
||||||
{ OMAP4_SLIMBUS1_CLKCTRL, omap4_slimbus1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0040:8" },
|
{ OMAP4_SLIMBUS1_CLKCTRL, omap4_slimbus1_bit_data, CLKF_SW_SUP, "abe-clkctrl:0040:8" },
|
||||||
{ OMAP4_TIMER5_CLKCTRL, omap4_timer5_bit_data, CLKF_SW_SUP, "abe_cm:clk:0048:24" },
|
{ OMAP4_TIMER5_CLKCTRL, omap4_timer5_bit_data, CLKF_SW_SUP, "abe-clkctrl:0048:24" },
|
||||||
{ OMAP4_TIMER6_CLKCTRL, omap4_timer6_bit_data, CLKF_SW_SUP, "abe_cm:clk:0050:24" },
|
{ OMAP4_TIMER6_CLKCTRL, omap4_timer6_bit_data, CLKF_SW_SUP, "abe-clkctrl:0050:24" },
|
||||||
{ OMAP4_TIMER7_CLKCTRL, omap4_timer7_bit_data, CLKF_SW_SUP, "abe_cm:clk:0058:24" },
|
{ OMAP4_TIMER7_CLKCTRL, omap4_timer7_bit_data, CLKF_SW_SUP, "abe-clkctrl:0058:24" },
|
||||||
{ OMAP4_TIMER8_CLKCTRL, omap4_timer8_bit_data, CLKF_SW_SUP, "abe_cm:clk:0060:24" },
|
{ OMAP4_TIMER8_CLKCTRL, omap4_timer8_bit_data, CLKF_SW_SUP, "abe-clkctrl:0060:24" },
|
||||||
{ OMAP4_WD_TIMER3_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
{ OMAP4_WD_TIMER3_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
@@ -287,7 +287,7 @@ static const struct omap_clkctrl_bit_data omap4_fdif_bit_data[] __initconst = {
|
|||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_iss_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_iss_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_ISS_CLKCTRL, omap4_iss_bit_data, CLKF_SW_SUP, "ducati_clk_mux_ck" },
|
{ OMAP4_ISS_CLKCTRL, omap4_iss_bit_data, CLKF_SW_SUP, "ducati_clk_mux_ck" },
|
||||||
{ OMAP4_FDIF_CLKCTRL, omap4_fdif_bit_data, CLKF_SW_SUP, "iss_cm:clk:0008:24" },
|
{ OMAP4_FDIF_CLKCTRL, omap4_fdif_bit_data, CLKF_SW_SUP, "iss-clkctrl:0008:24" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -320,7 +320,7 @@ static const struct omap_clkctrl_bit_data omap4_dss_core_bit_data[] __initconst
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_l3_dss_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_l3_dss_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_DSS_CORE_CLKCTRL, omap4_dss_core_bit_data, CLKF_SW_SUP, "l3_dss_cm:clk:0000:8" },
|
{ OMAP4_DSS_CORE_CLKCTRL, omap4_dss_core_bit_data, CLKF_SW_SUP, "l3-dss-clkctrl:0000:8" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -336,7 +336,7 @@ static const struct omap_clkctrl_bit_data omap4_gpu_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_l3_gfx_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_l3_gfx_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_GPU_CLKCTRL, omap4_gpu_bit_data, CLKF_SW_SUP, "l3_gfx_cm:clk:0000:24" },
|
{ OMAP4_GPU_CLKCTRL, omap4_gpu_bit_data, CLKF_SW_SUP, "l3-gfx-clkctrl:0000:24" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -372,12 +372,12 @@ static const struct omap_clkctrl_bit_data omap4_hsi_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_usb_host_hs_utmi_p1_clk_parents[] __initconst = {
|
static const char * const omap4_usb_host_hs_utmi_p1_clk_parents[] __initconst = {
|
||||||
"l3_init_cm:clk:0038:24",
|
"l3-init-clkctrl:0038:24",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_usb_host_hs_utmi_p2_clk_parents[] __initconst = {
|
static const char * const omap4_usb_host_hs_utmi_p2_clk_parents[] __initconst = {
|
||||||
"l3_init_cm:clk:0038:25",
|
"l3-init-clkctrl:0038:25",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -418,7 +418,7 @@ static const struct omap_clkctrl_bit_data omap4_usb_host_hs_bit_data[] __initcon
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_usb_otg_hs_xclk_parents[] __initconst = {
|
static const char * const omap4_usb_otg_hs_xclk_parents[] __initconst = {
|
||||||
"l3_init_cm:clk:0040:24",
|
"l3-init-clkctrl:0040:24",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -452,14 +452,14 @@ static const struct omap_clkctrl_bit_data omap4_ocp2scp_usb_phy_bit_data[] __ini
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_l3_init_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_l3_init_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_MMC1_CLKCTRL, omap4_mmc1_bit_data, CLKF_SW_SUP, "l3_init_cm:clk:0008:24" },
|
{ OMAP4_MMC1_CLKCTRL, omap4_mmc1_bit_data, CLKF_SW_SUP, "l3-init-clkctrl:0008:24" },
|
||||||
{ OMAP4_MMC2_CLKCTRL, omap4_mmc2_bit_data, CLKF_SW_SUP, "l3_init_cm:clk:0010:24" },
|
{ OMAP4_MMC2_CLKCTRL, omap4_mmc2_bit_data, CLKF_SW_SUP, "l3-init-clkctrl:0010:24" },
|
||||||
{ OMAP4_HSI_CLKCTRL, omap4_hsi_bit_data, CLKF_HW_SUP, "l3_init_cm:clk:0018:24" },
|
{ OMAP4_HSI_CLKCTRL, omap4_hsi_bit_data, CLKF_HW_SUP, "l3-init-clkctrl:0018:24" },
|
||||||
{ OMAP4_USB_HOST_HS_CLKCTRL, omap4_usb_host_hs_bit_data, CLKF_SW_SUP, "init_60m_fclk" },
|
{ OMAP4_USB_HOST_HS_CLKCTRL, omap4_usb_host_hs_bit_data, CLKF_SW_SUP, "init_60m_fclk" },
|
||||||
{ OMAP4_USB_OTG_HS_CLKCTRL, omap4_usb_otg_hs_bit_data, CLKF_HW_SUP, "l3_div_ck" },
|
{ OMAP4_USB_OTG_HS_CLKCTRL, omap4_usb_otg_hs_bit_data, CLKF_HW_SUP, "l3_div_ck" },
|
||||||
{ OMAP4_USB_TLL_HS_CLKCTRL, omap4_usb_tll_hs_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
{ OMAP4_USB_TLL_HS_CLKCTRL, omap4_usb_tll_hs_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
||||||
{ OMAP4_USB_HOST_FS_CLKCTRL, NULL, CLKF_SW_SUP, "func_48mc_fclk" },
|
{ OMAP4_USB_HOST_FS_CLKCTRL, NULL, CLKF_SW_SUP, "func_48mc_fclk" },
|
||||||
{ OMAP4_OCP2SCP_USB_PHY_CLKCTRL, omap4_ocp2scp_usb_phy_bit_data, CLKF_HW_SUP, "l3_init_cm:clk:00c0:8" },
|
{ OMAP4_OCP2SCP_USB_PHY_CLKCTRL, omap4_ocp2scp_usb_phy_bit_data, CLKF_HW_SUP, "l3-init-clkctrl:00c0:8" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -530,7 +530,7 @@ static const struct omap_clkctrl_bit_data omap4_gpio6_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_per_mcbsp4_gfclk_parents[] __initconst = {
|
static const char * const omap4_per_mcbsp4_gfclk_parents[] __initconst = {
|
||||||
"l4_per_cm:clk:00c0:26",
|
"l4-per-clkctrl:00c0:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
@@ -570,12 +570,12 @@ static const struct omap_clkctrl_bit_data omap4_slimbus2_bit_data[] __initconst
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap4_l4_per_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap4_l4_per_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP4_TIMER10_CLKCTRL, omap4_timer10_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0008:24" },
|
{ OMAP4_TIMER10_CLKCTRL, omap4_timer10_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0008:24" },
|
||||||
{ OMAP4_TIMER11_CLKCTRL, omap4_timer11_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0010:24" },
|
{ OMAP4_TIMER11_CLKCTRL, omap4_timer11_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0010:24" },
|
||||||
{ OMAP4_TIMER2_CLKCTRL, omap4_timer2_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0018:24" },
|
{ OMAP4_TIMER2_CLKCTRL, omap4_timer2_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0018:24" },
|
||||||
{ OMAP4_TIMER3_CLKCTRL, omap4_timer3_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0020:24" },
|
{ OMAP4_TIMER3_CLKCTRL, omap4_timer3_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0020:24" },
|
||||||
{ OMAP4_TIMER4_CLKCTRL, omap4_timer4_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0028:24" },
|
{ OMAP4_TIMER4_CLKCTRL, omap4_timer4_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0028:24" },
|
||||||
{ OMAP4_TIMER9_CLKCTRL, omap4_timer9_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0030:24" },
|
{ OMAP4_TIMER9_CLKCTRL, omap4_timer9_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0030:24" },
|
||||||
{ OMAP4_ELM_CLKCTRL, NULL, 0, "l4_div_ck" },
|
{ OMAP4_ELM_CLKCTRL, NULL, 0, "l4_div_ck" },
|
||||||
{ OMAP4_GPIO2_CLKCTRL, omap4_gpio2_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
{ OMAP4_GPIO2_CLKCTRL, omap4_gpio2_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
||||||
{ OMAP4_GPIO3_CLKCTRL, omap4_gpio3_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
{ OMAP4_GPIO3_CLKCTRL, omap4_gpio3_bit_data, CLKF_HW_SUP, "l4_div_ck" },
|
||||||
@@ -588,14 +588,14 @@ static const struct omap_clkctrl_reg_data omap4_l4_per_clkctrl_regs[] __initcons
|
|||||||
{ OMAP4_I2C3_CLKCTRL, NULL, CLKF_SW_SUP, "func_96m_fclk" },
|
{ OMAP4_I2C3_CLKCTRL, NULL, CLKF_SW_SUP, "func_96m_fclk" },
|
||||||
{ OMAP4_I2C4_CLKCTRL, NULL, CLKF_SW_SUP, "func_96m_fclk" },
|
{ OMAP4_I2C4_CLKCTRL, NULL, CLKF_SW_SUP, "func_96m_fclk" },
|
||||||
{ OMAP4_L4_PER_CLKCTRL, NULL, 0, "l4_div_ck" },
|
{ OMAP4_L4_PER_CLKCTRL, NULL, 0, "l4_div_ck" },
|
||||||
{ OMAP4_MCBSP4_CLKCTRL, omap4_mcbsp4_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:00c0:24" },
|
{ OMAP4_MCBSP4_CLKCTRL, omap4_mcbsp4_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:00c0:24" },
|
||||||
{ OMAP4_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_MCSPI2_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MCSPI2_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_MCSPI3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MCSPI3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_MCSPI4_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MCSPI4_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_MMC3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MMC3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_MMC4_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_MMC4_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_SLIMBUS2_CLKCTRL, omap4_slimbus2_bit_data, CLKF_SW_SUP, "l4_per_cm:clk:0118:8" },
|
{ OMAP4_SLIMBUS2_CLKCTRL, omap4_slimbus2_bit_data, CLKF_SW_SUP, "l4-per-clkctrl:0118:8" },
|
||||||
{ OMAP4_UART1_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_UART1_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_UART2_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_UART2_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
{ OMAP4_UART3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP4_UART3_CLKCTRL, NULL, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
@@ -630,7 +630,7 @@ static const struct omap_clkctrl_reg_data omap4_l4_wkup_clkctrl_regs[] __initcon
|
|||||||
{ OMAP4_L4_WKUP_CLKCTRL, NULL, 0, "l4_wkup_clk_mux_ck" },
|
{ OMAP4_L4_WKUP_CLKCTRL, NULL, 0, "l4_wkup_clk_mux_ck" },
|
||||||
{ OMAP4_WD_TIMER2_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
{ OMAP4_WD_TIMER2_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
||||||
{ OMAP4_GPIO1_CLKCTRL, omap4_gpio1_bit_data, CLKF_HW_SUP, "l4_wkup_clk_mux_ck" },
|
{ OMAP4_GPIO1_CLKCTRL, omap4_gpio1_bit_data, CLKF_HW_SUP, "l4_wkup_clk_mux_ck" },
|
||||||
{ OMAP4_TIMER1_CLKCTRL, omap4_timer1_bit_data, CLKF_SW_SUP, "l4_wkup_cm:clk:0020:24" },
|
{ OMAP4_TIMER1_CLKCTRL, omap4_timer1_bit_data, CLKF_SW_SUP, "l4-wkup-clkctrl:0020:24" },
|
||||||
{ OMAP4_COUNTER_32K_CLKCTRL, NULL, 0, "sys_32k_ck" },
|
{ OMAP4_COUNTER_32K_CLKCTRL, NULL, 0, "sys_32k_ck" },
|
||||||
{ OMAP4_KBD_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
{ OMAP4_KBD_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
@@ -644,7 +644,7 @@ static const char * const omap4_pmd_stm_clock_mux_ck_parents[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_trace_clk_div_div_ck_parents[] __initconst = {
|
static const char * const omap4_trace_clk_div_div_ck_parents[] __initconst = {
|
||||||
"emu_sys_cm:clk:0000:22",
|
"emu-sys-clkctrl:0000:22",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -662,7 +662,7 @@ static const struct omap_clkctrl_div_data omap4_trace_clk_div_div_ck_data __init
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap4_stm_clk_div_ck_parents[] __initconst = {
|
static const char * const omap4_stm_clk_div_ck_parents[] __initconst = {
|
||||||
"emu_sys_cm:clk:0000:20",
|
"emu-sys-clkctrl:0000:20",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -716,73 +716,73 @@ static struct ti_dt_clk omap44xx_clks[] = {
|
|||||||
* hwmod support. Once hwmod is removed, these can be removed
|
* hwmod support. Once hwmod is removed, these can be removed
|
||||||
* also.
|
* also.
|
||||||
*/
|
*/
|
||||||
DT_CLK(NULL, "aess_fclk", "abe_cm:0008:24"),
|
DT_CLK(NULL, "aess_fclk", "abe-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "cm2_dm10_mux", "l4_per_cm:0008:24"),
|
DT_CLK(NULL, "cm2_dm10_mux", "l4-per-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "cm2_dm11_mux", "l4_per_cm:0010:24"),
|
DT_CLK(NULL, "cm2_dm11_mux", "l4-per-clkctrl:0010:24"),
|
||||||
DT_CLK(NULL, "cm2_dm2_mux", "l4_per_cm:0018:24"),
|
DT_CLK(NULL, "cm2_dm2_mux", "l4-per-clkctrl:0018:24"),
|
||||||
DT_CLK(NULL, "cm2_dm3_mux", "l4_per_cm:0020:24"),
|
DT_CLK(NULL, "cm2_dm3_mux", "l4-per-clkctrl:0020:24"),
|
||||||
DT_CLK(NULL, "cm2_dm4_mux", "l4_per_cm:0028:24"),
|
DT_CLK(NULL, "cm2_dm4_mux", "l4-per-clkctrl:0028:24"),
|
||||||
DT_CLK(NULL, "cm2_dm9_mux", "l4_per_cm:0030:24"),
|
DT_CLK(NULL, "cm2_dm9_mux", "l4-per-clkctrl:0030:24"),
|
||||||
DT_CLK(NULL, "dmic_sync_mux_ck", "abe_cm:0018:26"),
|
DT_CLK(NULL, "dmic_sync_mux_ck", "abe-clkctrl:0018:26"),
|
||||||
DT_CLK(NULL, "dmt1_clk_mux", "l4_wkup_cm:0020:24"),
|
DT_CLK(NULL, "dmt1_clk_mux", "l4-wkup-clkctrl:0020:24"),
|
||||||
DT_CLK(NULL, "dss_48mhz_clk", "l3_dss_cm:0000:9"),
|
DT_CLK(NULL, "dss_48mhz_clk", "l3-dss-clkctrl:0000:9"),
|
||||||
DT_CLK(NULL, "dss_dss_clk", "l3_dss_cm:0000:8"),
|
DT_CLK(NULL, "dss_dss_clk", "l3-dss-clkctrl:0000:8"),
|
||||||
DT_CLK(NULL, "dss_sys_clk", "l3_dss_cm:0000:10"),
|
DT_CLK(NULL, "dss_sys_clk", "l3-dss-clkctrl:0000:10"),
|
||||||
DT_CLK(NULL, "dss_tv_clk", "l3_dss_cm:0000:11"),
|
DT_CLK(NULL, "dss_tv_clk", "l3-dss-clkctrl:0000:11"),
|
||||||
DT_CLK(NULL, "fdif_fck", "iss_cm:0008:24"),
|
DT_CLK(NULL, "fdif_fck", "iss-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "func_dmic_abe_gfclk", "abe_cm:0018:24"),
|
DT_CLK(NULL, "func_dmic_abe_gfclk", "abe-clkctrl:0018:24"),
|
||||||
DT_CLK(NULL, "func_mcasp_abe_gfclk", "abe_cm:0020:24"),
|
DT_CLK(NULL, "func_mcasp_abe_gfclk", "abe-clkctrl:0020:24"),
|
||||||
DT_CLK(NULL, "func_mcbsp1_gfclk", "abe_cm:0028:24"),
|
DT_CLK(NULL, "func_mcbsp1_gfclk", "abe-clkctrl:0028:24"),
|
||||||
DT_CLK(NULL, "func_mcbsp2_gfclk", "abe_cm:0030:24"),
|
DT_CLK(NULL, "func_mcbsp2_gfclk", "abe-clkctrl:0030:24"),
|
||||||
DT_CLK(NULL, "func_mcbsp3_gfclk", "abe_cm:0038:24"),
|
DT_CLK(NULL, "func_mcbsp3_gfclk", "abe-clkctrl:0038:24"),
|
||||||
DT_CLK(NULL, "gpio1_dbclk", "l4_wkup_cm:0018:8"),
|
DT_CLK(NULL, "gpio1_dbclk", "l4-wkup-clkctrl:0018:8"),
|
||||||
DT_CLK(NULL, "gpio2_dbclk", "l4_per_cm:0040:8"),
|
DT_CLK(NULL, "gpio2_dbclk", "l4-per-clkctrl:0040:8"),
|
||||||
DT_CLK(NULL, "gpio3_dbclk", "l4_per_cm:0048:8"),
|
DT_CLK(NULL, "gpio3_dbclk", "l4-per-clkctrl:0048:8"),
|
||||||
DT_CLK(NULL, "gpio4_dbclk", "l4_per_cm:0050:8"),
|
DT_CLK(NULL, "gpio4_dbclk", "l4-per-clkctrl:0050:8"),
|
||||||
DT_CLK(NULL, "gpio5_dbclk", "l4_per_cm:0058:8"),
|
DT_CLK(NULL, "gpio5_dbclk", "l4-per-clkctrl:0058:8"),
|
||||||
DT_CLK(NULL, "gpio6_dbclk", "l4_per_cm:0060:8"),
|
DT_CLK(NULL, "gpio6_dbclk", "l4-per-clkctrl:0060:8"),
|
||||||
DT_CLK(NULL, "hsi_fck", "l3_init_cm:0018:24"),
|
DT_CLK(NULL, "hsi_fck", "l3-init-clkctrl:0018:24"),
|
||||||
DT_CLK(NULL, "hsmmc1_fclk", "l3_init_cm:0008:24"),
|
DT_CLK(NULL, "hsmmc1_fclk", "l3-init-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "hsmmc2_fclk", "l3_init_cm:0010:24"),
|
DT_CLK(NULL, "hsmmc2_fclk", "l3-init-clkctrl:0010:24"),
|
||||||
DT_CLK(NULL, "iss_ctrlclk", "iss_cm:0000:8"),
|
DT_CLK(NULL, "iss_ctrlclk", "iss-clkctrl:0000:8"),
|
||||||
DT_CLK(NULL, "mcasp_sync_mux_ck", "abe_cm:0020:26"),
|
DT_CLK(NULL, "mcasp_sync_mux_ck", "abe-clkctrl:0020:26"),
|
||||||
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe_cm:0028:26"),
|
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"),
|
||||||
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe_cm:0030:26"),
|
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"),
|
||||||
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe_cm:0038:26"),
|
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"),
|
||||||
DT_CLK(NULL, "mcbsp4_sync_mux_ck", "l4_per_cm:00c0:26"),
|
DT_CLK(NULL, "mcbsp4_sync_mux_ck", "l4-per-clkctrl:00c0:26"),
|
||||||
DT_CLK(NULL, "ocp2scp_usb_phy_phy_48m", "l3_init_cm:00c0:8"),
|
DT_CLK(NULL, "ocp2scp_usb_phy_phy_48m", "l3-init-clkctrl:00c0:8"),
|
||||||
DT_CLK(NULL, "otg_60m_gfclk", "l3_init_cm:0040:24"),
|
DT_CLK(NULL, "otg_60m_gfclk", "l3-init-clkctrl:0040:24"),
|
||||||
DT_CLK(NULL, "per_mcbsp4_gfclk", "l4_per_cm:00c0:24"),
|
DT_CLK(NULL, "per_mcbsp4_gfclk", "l4-per-clkctrl:00c0:24"),
|
||||||
DT_CLK(NULL, "pmd_stm_clock_mux_ck", "emu_sys_cm:0000:20"),
|
DT_CLK(NULL, "pmd_stm_clock_mux_ck", "emu-sys-clkctrl:0000:20"),
|
||||||
DT_CLK(NULL, "pmd_trace_clk_mux_ck", "emu_sys_cm:0000:22"),
|
DT_CLK(NULL, "pmd_trace_clk_mux_ck", "emu-sys-clkctrl:0000:22"),
|
||||||
DT_CLK(NULL, "sgx_clk_mux", "l3_gfx_cm:0000:24"),
|
DT_CLK(NULL, "sgx_clk_mux", "l3-gfx-clkctrl:0000:24"),
|
||||||
DT_CLK(NULL, "slimbus1_fclk_0", "abe_cm:0040:8"),
|
DT_CLK(NULL, "slimbus1_fclk_0", "abe-clkctrl:0040:8"),
|
||||||
DT_CLK(NULL, "slimbus1_fclk_1", "abe_cm:0040:9"),
|
DT_CLK(NULL, "slimbus1_fclk_1", "abe-clkctrl:0040:9"),
|
||||||
DT_CLK(NULL, "slimbus1_fclk_2", "abe_cm:0040:10"),
|
DT_CLK(NULL, "slimbus1_fclk_2", "abe-clkctrl:0040:10"),
|
||||||
DT_CLK(NULL, "slimbus1_slimbus_clk", "abe_cm:0040:11"),
|
DT_CLK(NULL, "slimbus1_slimbus_clk", "abe-clkctrl:0040:11"),
|
||||||
DT_CLK(NULL, "slimbus2_fclk_0", "l4_per_cm:0118:8"),
|
DT_CLK(NULL, "slimbus2_fclk_0", "l4-per-clkctrl:0118:8"),
|
||||||
DT_CLK(NULL, "slimbus2_fclk_1", "l4_per_cm:0118:9"),
|
DT_CLK(NULL, "slimbus2_fclk_1", "l4-per-clkctrl:0118:9"),
|
||||||
DT_CLK(NULL, "slimbus2_slimbus_clk", "l4_per_cm:0118:10"),
|
DT_CLK(NULL, "slimbus2_slimbus_clk", "l4-per-clkctrl:0118:10"),
|
||||||
DT_CLK(NULL, "stm_clk_div_ck", "emu_sys_cm:0000:27"),
|
DT_CLK(NULL, "stm_clk_div_ck", "emu-sys-clkctrl:0000:27"),
|
||||||
DT_CLK(NULL, "timer5_sync_mux", "abe_cm:0048:24"),
|
DT_CLK(NULL, "timer5_sync_mux", "abe-clkctrl:0048:24"),
|
||||||
DT_CLK(NULL, "timer6_sync_mux", "abe_cm:0050:24"),
|
DT_CLK(NULL, "timer6_sync_mux", "abe-clkctrl:0050:24"),
|
||||||
DT_CLK(NULL, "timer7_sync_mux", "abe_cm:0058:24"),
|
DT_CLK(NULL, "timer7_sync_mux", "abe-clkctrl:0058:24"),
|
||||||
DT_CLK(NULL, "timer8_sync_mux", "abe_cm:0060:24"),
|
DT_CLK(NULL, "timer8_sync_mux", "abe-clkctrl:0060:24"),
|
||||||
DT_CLK(NULL, "trace_clk_div_div_ck", "emu_sys_cm:0000:24"),
|
DT_CLK(NULL, "trace_clk_div_div_ck", "emu-sys-clkctrl:0000:24"),
|
||||||
DT_CLK(NULL, "usb_host_hs_func48mclk", "l3_init_cm:0038:15"),
|
DT_CLK(NULL, "usb_host_hs_func48mclk", "l3-init-clkctrl:0038:15"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3_init_cm:0038:13"),
|
DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3-init-clkctrl:0038:13"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3_init_cm:0038:14"),
|
DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3-init-clkctrl:0038:14"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3_init_cm:0038:11"),
|
DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3-init-clkctrl:0038:11"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3_init_cm:0038:12"),
|
DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3-init-clkctrl:0038:12"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3_init_cm:0038:8"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3-init-clkctrl:0038:8"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3_init_cm:0038:9"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3-init-clkctrl:0038:9"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3_init_cm:0038:10"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3_init-clkctrl:0038:10"),
|
||||||
DT_CLK(NULL, "usb_otg_hs_xclk", "l3_init_cm:0040:8"),
|
DT_CLK(NULL, "usb_otg_hs_xclk", "l3-init-clkctrl:0040:8"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3_init_cm:0048:8"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3-init-clkctrl:0048:8"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3_init_cm:0048:9"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3-init-clkctrl:0048:9"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3_init_cm:0048:10"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3-init-clkctrl:0048:10"),
|
||||||
DT_CLK(NULL, "utmi_p1_gfclk", "l3_init_cm:0038:24"),
|
DT_CLK(NULL, "utmi_p1_gfclk", "l3-init-clkctrl:0038:24"),
|
||||||
DT_CLK(NULL, "utmi_p2_gfclk", "l3_init_cm:0038:25"),
|
DT_CLK(NULL, "utmi_p2_gfclk", "l3-init-clkctrl:0038:25"),
|
||||||
{ .node_name = NULL },
|
{ .node_name = NULL },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -50,7 +50,7 @@ static const struct omap_clkctrl_bit_data omap5_aess_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_dmic_gfclk_parents[] __initconst = {
|
static const char * const omap5_dmic_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0018:26",
|
"abe-clkctrl:0018:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -70,7 +70,7 @@ static const struct omap_clkctrl_bit_data omap5_dmic_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_mcbsp1_gfclk_parents[] __initconst = {
|
static const char * const omap5_mcbsp1_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0028:26",
|
"abe-clkctrl:0028:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -83,7 +83,7 @@ static const struct omap_clkctrl_bit_data omap5_mcbsp1_bit_data[] __initconst =
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_mcbsp2_gfclk_parents[] __initconst = {
|
static const char * const omap5_mcbsp2_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0030:26",
|
"abe-clkctrl:0030:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -96,7 +96,7 @@ static const struct omap_clkctrl_bit_data omap5_mcbsp2_bit_data[] __initconst =
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_mcbsp3_gfclk_parents[] __initconst = {
|
static const char * const omap5_mcbsp3_gfclk_parents[] __initconst = {
|
||||||
"abe_cm:clk:0038:26",
|
"abe-clkctrl:0038:26",
|
||||||
"pad_clks_ck",
|
"pad_clks_ck",
|
||||||
"slimbus_clk",
|
"slimbus_clk",
|
||||||
NULL,
|
NULL,
|
||||||
@@ -136,16 +136,16 @@ static const struct omap_clkctrl_bit_data omap5_timer8_bit_data[] __initconst =
|
|||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap5_abe_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap5_abe_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP5_L4_ABE_CLKCTRL, NULL, 0, "abe_iclk" },
|
{ OMAP5_L4_ABE_CLKCTRL, NULL, 0, "abe_iclk" },
|
||||||
{ OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe_cm:clk:0008:24" },
|
{ OMAP5_AESS_CLKCTRL, omap5_aess_bit_data, CLKF_SW_SUP, "abe-clkctrl:0008:24" },
|
||||||
{ OMAP5_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
|
{ OMAP5_MCPDM_CLKCTRL, NULL, CLKF_SW_SUP, "pad_clks_ck" },
|
||||||
{ OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe_cm:clk:0018:24" },
|
{ OMAP5_DMIC_CLKCTRL, omap5_dmic_bit_data, CLKF_SW_SUP, "abe-clkctrl:0018:24" },
|
||||||
{ OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe_cm:clk:0028:24" },
|
{ OMAP5_MCBSP1_CLKCTRL, omap5_mcbsp1_bit_data, CLKF_SW_SUP, "abe-clkctrl:0028:24" },
|
||||||
{ OMAP5_MCBSP2_CLKCTRL, omap5_mcbsp2_bit_data, CLKF_SW_SUP, "abe_cm:clk:0030:24" },
|
{ OMAP5_MCBSP2_CLKCTRL, omap5_mcbsp2_bit_data, CLKF_SW_SUP, "abe-clkctrl:0030:24" },
|
||||||
{ OMAP5_MCBSP3_CLKCTRL, omap5_mcbsp3_bit_data, CLKF_SW_SUP, "abe_cm:clk:0038:24" },
|
{ OMAP5_MCBSP3_CLKCTRL, omap5_mcbsp3_bit_data, CLKF_SW_SUP, "abe-clkctrl:0038:24" },
|
||||||
{ OMAP5_TIMER5_CLKCTRL, omap5_timer5_bit_data, CLKF_SW_SUP, "abe_cm:clk:0048:24" },
|
{ OMAP5_TIMER5_CLKCTRL, omap5_timer5_bit_data, CLKF_SW_SUP, "abe-clkctrl:0048:24" },
|
||||||
{ OMAP5_TIMER6_CLKCTRL, omap5_timer6_bit_data, CLKF_SW_SUP, "abe_cm:clk:0050:24" },
|
{ OMAP5_TIMER6_CLKCTRL, omap5_timer6_bit_data, CLKF_SW_SUP, "abe-clkctrl:0050:24" },
|
||||||
{ OMAP5_TIMER7_CLKCTRL, omap5_timer7_bit_data, CLKF_SW_SUP, "abe_cm:clk:0058:24" },
|
{ OMAP5_TIMER7_CLKCTRL, omap5_timer7_bit_data, CLKF_SW_SUP, "abe-clkctrl:0058:24" },
|
||||||
{ OMAP5_TIMER8_CLKCTRL, omap5_timer8_bit_data, CLKF_SW_SUP, "abe_cm:clk:0060:24" },
|
{ OMAP5_TIMER8_CLKCTRL, omap5_timer8_bit_data, CLKF_SW_SUP, "abe-clkctrl:0060:24" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -268,12 +268,12 @@ static const struct omap_clkctrl_bit_data omap5_gpio8_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap5_l4per_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap5_l4per_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP5_TIMER10_CLKCTRL, omap5_timer10_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0008:24" },
|
{ OMAP5_TIMER10_CLKCTRL, omap5_timer10_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0008:24" },
|
||||||
{ OMAP5_TIMER11_CLKCTRL, omap5_timer11_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0010:24" },
|
{ OMAP5_TIMER11_CLKCTRL, omap5_timer11_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0010:24" },
|
||||||
{ OMAP5_TIMER2_CLKCTRL, omap5_timer2_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0018:24" },
|
{ OMAP5_TIMER2_CLKCTRL, omap5_timer2_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0018:24" },
|
||||||
{ OMAP5_TIMER3_CLKCTRL, omap5_timer3_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0020:24" },
|
{ OMAP5_TIMER3_CLKCTRL, omap5_timer3_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0020:24" },
|
||||||
{ OMAP5_TIMER4_CLKCTRL, omap5_timer4_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0028:24" },
|
{ OMAP5_TIMER4_CLKCTRL, omap5_timer4_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0028:24" },
|
||||||
{ OMAP5_TIMER9_CLKCTRL, omap5_timer9_bit_data, CLKF_SW_SUP, "l4per_cm:clk:0030:24" },
|
{ OMAP5_TIMER9_CLKCTRL, omap5_timer9_bit_data, CLKF_SW_SUP, "l4per-clkctrl:0030:24" },
|
||||||
{ OMAP5_GPIO2_CLKCTRL, omap5_gpio2_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
{ OMAP5_GPIO2_CLKCTRL, omap5_gpio2_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
||||||
{ OMAP5_GPIO3_CLKCTRL, omap5_gpio3_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
{ OMAP5_GPIO3_CLKCTRL, omap5_gpio3_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
||||||
{ OMAP5_GPIO4_CLKCTRL, omap5_gpio4_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
{ OMAP5_GPIO4_CLKCTRL, omap5_gpio4_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
||||||
@@ -345,7 +345,7 @@ static const struct omap_clkctrl_bit_data omap5_dss_core_bit_data[] __initconst
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap5_dss_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap5_dss_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP5_DSS_CORE_CLKCTRL, omap5_dss_core_bit_data, CLKF_SW_SUP, "dss_cm:clk:0000:8" },
|
{ OMAP5_DSS_CORE_CLKCTRL, omap5_dss_core_bit_data, CLKF_SW_SUP, "dss-clkctrl:0000:8" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -378,7 +378,7 @@ static const struct omap_clkctrl_bit_data omap5_gpu_core_bit_data[] __initconst
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap5_gpu_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap5_gpu_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP5_GPU_CLKCTRL, omap5_gpu_core_bit_data, CLKF_SW_SUP, "gpu_cm:clk:0000:24" },
|
{ OMAP5_GPU_CLKCTRL, omap5_gpu_core_bit_data, CLKF_SW_SUP, "gpu-clkctrl:0000:24" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -389,7 +389,7 @@ static const char * const omap5_mmc1_fclk_mux_parents[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_mmc1_fclk_parents[] __initconst = {
|
static const char * const omap5_mmc1_fclk_parents[] __initconst = {
|
||||||
"l3init_cm:clk:0008:24",
|
"l3init-clkctrl:0008:24",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -405,7 +405,7 @@ static const struct omap_clkctrl_bit_data omap5_mmc1_bit_data[] __initconst = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_mmc2_fclk_parents[] __initconst = {
|
static const char * const omap5_mmc2_fclk_parents[] __initconst = {
|
||||||
"l3init_cm:clk:0010:24",
|
"l3init-clkctrl:0010:24",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -430,12 +430,12 @@ static const char * const omap5_usb_host_hs_hsic480m_p3_clk_parents[] __initcons
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_usb_host_hs_utmi_p1_clk_parents[] __initconst = {
|
static const char * const omap5_usb_host_hs_utmi_p1_clk_parents[] __initconst = {
|
||||||
"l3init_cm:clk:0038:24",
|
"l3init-clkctrl:0038:24",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char * const omap5_usb_host_hs_utmi_p2_clk_parents[] __initconst = {
|
static const char * const omap5_usb_host_hs_utmi_p2_clk_parents[] __initconst = {
|
||||||
"l3init_cm:clk:0038:25",
|
"l3init-clkctrl:0038:25",
|
||||||
NULL,
|
NULL,
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -494,8 +494,8 @@ static const struct omap_clkctrl_bit_data omap5_usb_otg_ss_bit_data[] __initcons
|
|||||||
};
|
};
|
||||||
|
|
||||||
static const struct omap_clkctrl_reg_data omap5_l3init_clkctrl_regs[] __initconst = {
|
static const struct omap_clkctrl_reg_data omap5_l3init_clkctrl_regs[] __initconst = {
|
||||||
{ OMAP5_MMC1_CLKCTRL, omap5_mmc1_bit_data, CLKF_SW_SUP, "l3init_cm:clk:0008:25" },
|
{ OMAP5_MMC1_CLKCTRL, omap5_mmc1_bit_data, CLKF_SW_SUP, "l3init-clkctrl:0008:25" },
|
||||||
{ OMAP5_MMC2_CLKCTRL, omap5_mmc2_bit_data, CLKF_SW_SUP, "l3init_cm:clk:0010:25" },
|
{ OMAP5_MMC2_CLKCTRL, omap5_mmc2_bit_data, CLKF_SW_SUP, "l3init-clkctrl:0010:25" },
|
||||||
{ OMAP5_USB_HOST_HS_CLKCTRL, omap5_usb_host_hs_bit_data, CLKF_SW_SUP, "l3init_60m_fclk" },
|
{ OMAP5_USB_HOST_HS_CLKCTRL, omap5_usb_host_hs_bit_data, CLKF_SW_SUP, "l3init_60m_fclk" },
|
||||||
{ OMAP5_USB_TLL_HS_CLKCTRL, omap5_usb_tll_hs_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
{ OMAP5_USB_TLL_HS_CLKCTRL, omap5_usb_tll_hs_bit_data, CLKF_HW_SUP, "l4_root_clk_div" },
|
||||||
{ OMAP5_SATA_CLKCTRL, omap5_sata_bit_data, CLKF_SW_SUP, "func_48m_fclk" },
|
{ OMAP5_SATA_CLKCTRL, omap5_sata_bit_data, CLKF_SW_SUP, "func_48m_fclk" },
|
||||||
@@ -519,7 +519,7 @@ static const struct omap_clkctrl_reg_data omap5_wkupaon_clkctrl_regs[] __initcon
|
|||||||
{ OMAP5_L4_WKUP_CLKCTRL, NULL, 0, "wkupaon_iclk_mux" },
|
{ OMAP5_L4_WKUP_CLKCTRL, NULL, 0, "wkupaon_iclk_mux" },
|
||||||
{ OMAP5_WD_TIMER2_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
{ OMAP5_WD_TIMER2_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
||||||
{ OMAP5_GPIO1_CLKCTRL, omap5_gpio1_bit_data, CLKF_HW_SUP, "wkupaon_iclk_mux" },
|
{ OMAP5_GPIO1_CLKCTRL, omap5_gpio1_bit_data, CLKF_HW_SUP, "wkupaon_iclk_mux" },
|
||||||
{ OMAP5_TIMER1_CLKCTRL, omap5_timer1_bit_data, CLKF_SW_SUP, "wkupaon_cm:clk:0020:24" },
|
{ OMAP5_TIMER1_CLKCTRL, omap5_timer1_bit_data, CLKF_SW_SUP, "wkupaon-clkctrl:0020:24" },
|
||||||
{ OMAP5_COUNTER_32K_CLKCTRL, NULL, 0, "wkupaon_iclk_mux" },
|
{ OMAP5_COUNTER_32K_CLKCTRL, NULL, 0, "wkupaon_iclk_mux" },
|
||||||
{ OMAP5_KBD_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
{ OMAP5_KBD_CLKCTRL, NULL, CLKF_SW_SUP, "sys_32k_ck" },
|
||||||
{ 0 },
|
{ 0 },
|
||||||
@@ -549,58 +549,58 @@ const struct omap_clkctrl_data omap5_clkctrl_data[] __initconst = {
|
|||||||
static struct ti_dt_clk omap54xx_clks[] = {
|
static struct ti_dt_clk omap54xx_clks[] = {
|
||||||
DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"),
|
DT_CLK(NULL, "timer_32k_ck", "sys_32k_ck"),
|
||||||
DT_CLK(NULL, "sys_clkin_ck", "sys_clkin"),
|
DT_CLK(NULL, "sys_clkin_ck", "sys_clkin"),
|
||||||
DT_CLK(NULL, "dmic_gfclk", "abe_cm:0018:24"),
|
DT_CLK(NULL, "dmic_gfclk", "abe-clkctrl:0018:24"),
|
||||||
DT_CLK(NULL, "dmic_sync_mux_ck", "abe_cm:0018:26"),
|
DT_CLK(NULL, "dmic_sync_mux_ck", "abe-clkctrl:0018:26"),
|
||||||
DT_CLK(NULL, "dss_32khz_clk", "dss_cm:0000:11"),
|
DT_CLK(NULL, "dss_32khz_clk", "dss-clkctrl:0000:11"),
|
||||||
DT_CLK(NULL, "dss_48mhz_clk", "dss_cm:0000:9"),
|
DT_CLK(NULL, "dss_48mhz_clk", "dss-clkctrl:0000:9"),
|
||||||
DT_CLK(NULL, "dss_dss_clk", "dss_cm:0000:8"),
|
DT_CLK(NULL, "dss_dss_clk", "dss-clkctrl:0000:8"),
|
||||||
DT_CLK(NULL, "dss_sys_clk", "dss_cm:0000:10"),
|
DT_CLK(NULL, "dss_sys_clk", "dss-clkctrl:0000:10"),
|
||||||
DT_CLK(NULL, "gpio1_dbclk", "wkupaon_cm:0018:8"),
|
DT_CLK(NULL, "gpio1_dbclk", "wkupaon-clkctrl:0018:8"),
|
||||||
DT_CLK(NULL, "gpio2_dbclk", "l4per_cm:0040:8"),
|
DT_CLK(NULL, "gpio2_dbclk", "l4per-clkctrl:0040:8"),
|
||||||
DT_CLK(NULL, "gpio3_dbclk", "l4per_cm:0048:8"),
|
DT_CLK(NULL, "gpio3_dbclk", "l4per-clkctrl:0048:8"),
|
||||||
DT_CLK(NULL, "gpio4_dbclk", "l4per_cm:0050:8"),
|
DT_CLK(NULL, "gpio4_dbclk", "l4per-clkctrl:0050:8"),
|
||||||
DT_CLK(NULL, "gpio5_dbclk", "l4per_cm:0058:8"),
|
DT_CLK(NULL, "gpio5_dbclk", "l4per-clkctrl:0058:8"),
|
||||||
DT_CLK(NULL, "gpio6_dbclk", "l4per_cm:0060:8"),
|
DT_CLK(NULL, "gpio6_dbclk", "l4per-clkctrl:0060:8"),
|
||||||
DT_CLK(NULL, "gpio7_dbclk", "l4per_cm:00f0:8"),
|
DT_CLK(NULL, "gpio7_dbclk", "l4per-clkctrl:00f0:8"),
|
||||||
DT_CLK(NULL, "gpio8_dbclk", "l4per_cm:00f8:8"),
|
DT_CLK(NULL, "gpio8_dbclk", "l4per-clkctrl:00f8:8"),
|
||||||
DT_CLK(NULL, "mcbsp1_gfclk", "abe_cm:0028:24"),
|
DT_CLK(NULL, "mcbsp1_gfclk", "abe-clkctrl:0028:24"),
|
||||||
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe_cm:0028:26"),
|
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"),
|
||||||
DT_CLK(NULL, "mcbsp2_gfclk", "abe_cm:0030:24"),
|
DT_CLK(NULL, "mcbsp2_gfclk", "abe-clkctrl:0030:24"),
|
||||||
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe_cm:0030:26"),
|
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"),
|
||||||
DT_CLK(NULL, "mcbsp3_gfclk", "abe_cm:0038:24"),
|
DT_CLK(NULL, "mcbsp3_gfclk", "abe-clkctrl:0038:24"),
|
||||||
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe_cm:0038:26"),
|
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"),
|
||||||
DT_CLK(NULL, "mmc1_32khz_clk", "l3init_cm:0008:8"),
|
DT_CLK(NULL, "mmc1_32khz_clk", "l3init-clkctrl:0008:8"),
|
||||||
DT_CLK(NULL, "mmc1_fclk", "l3init_cm:0008:25"),
|
DT_CLK(NULL, "mmc1_fclk", "l3init-clkctrl:0008:25"),
|
||||||
DT_CLK(NULL, "mmc1_fclk_mux", "l3init_cm:0008:24"),
|
DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "mmc2_fclk", "l3init_cm:0010:25"),
|
DT_CLK(NULL, "mmc2_fclk", "l3init-clkctrl:0010:25"),
|
||||||
DT_CLK(NULL, "mmc2_fclk_mux", "l3init_cm:0010:24"),
|
DT_CLK(NULL, "mmc2_fclk_mux", "l3init-clkctrl:0010:24"),
|
||||||
DT_CLK(NULL, "sata_ref_clk", "l3init_cm:0068:8"),
|
DT_CLK(NULL, "sata_ref_clk", "l3init-clkctrl:0068:8"),
|
||||||
DT_CLK(NULL, "timer10_gfclk_mux", "l4per_cm:0008:24"),
|
DT_CLK(NULL, "timer10_gfclk_mux", "l4per-clkctrl:0008:24"),
|
||||||
DT_CLK(NULL, "timer11_gfclk_mux", "l4per_cm:0010:24"),
|
DT_CLK(NULL, "timer11_gfclk_mux", "l4per-clkctrl:0010:24"),
|
||||||
DT_CLK(NULL, "timer1_gfclk_mux", "wkupaon_cm:0020:24"),
|
DT_CLK(NULL, "timer1_gfclk_mux", "wkupaon-clkctrl:0020:24"),
|
||||||
DT_CLK(NULL, "timer2_gfclk_mux", "l4per_cm:0018:24"),
|
DT_CLK(NULL, "timer2_gfclk_mux", "l4per-clkctrl:0018:24"),
|
||||||
DT_CLK(NULL, "timer3_gfclk_mux", "l4per_cm:0020:24"),
|
DT_CLK(NULL, "timer3_gfclk_mux", "l4per-clkctrl:0020:24"),
|
||||||
DT_CLK(NULL, "timer4_gfclk_mux", "l4per_cm:0028:24"),
|
DT_CLK(NULL, "timer4_gfclk_mux", "l4per-clkctrl:0028:24"),
|
||||||
DT_CLK(NULL, "timer5_gfclk_mux", "abe_cm:0048:24"),
|
DT_CLK(NULL, "timer5_gfclk_mux", "abe-clkctrl:0048:24"),
|
||||||
DT_CLK(NULL, "timer6_gfclk_mux", "abe_cm:0050:24"),
|
DT_CLK(NULL, "timer6_gfclk_mux", "abe-clkctrl:0050:24"),
|
||||||
DT_CLK(NULL, "timer7_gfclk_mux", "abe_cm:0058:24"),
|
DT_CLK(NULL, "timer7_gfclk_mux", "abe-clkctrl:0058:24"),
|
||||||
DT_CLK(NULL, "timer8_gfclk_mux", "abe_cm:0060:24"),
|
DT_CLK(NULL, "timer8_gfclk_mux", "abe-clkctrl:0060:24"),
|
||||||
DT_CLK(NULL, "timer9_gfclk_mux", "l4per_cm:0030:24"),
|
DT_CLK(NULL, "timer9_gfclk_mux", "l4per-clkctrl:0030:24"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3init_cm:0038:13"),
|
DT_CLK(NULL, "usb_host_hs_hsic480m_p1_clk", "l3init-clkctrl:0038:13"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3init_cm:0038:14"),
|
DT_CLK(NULL, "usb_host_hs_hsic480m_p2_clk", "l3init-clkctrl:0038:14"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "l3init_cm:0038:7"),
|
DT_CLK(NULL, "usb_host_hs_hsic480m_p3_clk", "l3init-clkctrl:0038:7"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3init_cm:0038:11"),
|
DT_CLK(NULL, "usb_host_hs_hsic60m_p1_clk", "l3init-clkctrl:0038:11"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3init_cm:0038:12"),
|
DT_CLK(NULL, "usb_host_hs_hsic60m_p2_clk", "l3init-clkctrl:0038:12"),
|
||||||
DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "l3init_cm:0038:6"),
|
DT_CLK(NULL, "usb_host_hs_hsic60m_p3_clk", "l3init-clkctrl:0038:6"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3init_cm:0038:8"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p1_clk", "l3init-clkctrl:0038:8"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3init_cm:0038:9"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p2_clk", "l3init-clkctrl:0038:9"),
|
||||||
DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3init_cm:0038:10"),
|
DT_CLK(NULL, "usb_host_hs_utmi_p3_clk", "l3init-clkctrl:0038:10"),
|
||||||
DT_CLK(NULL, "usb_otg_ss_refclk960m", "l3init_cm:00d0:8"),
|
DT_CLK(NULL, "usb_otg_ss_refclk960m", "l3init-clkctrl:00d0:8"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3init_cm:0048:8"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch0_clk", "l3init-clkctrl:0048:8"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3init_cm:0048:9"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch1_clk", "l3init-clkctrl:0048:9"),
|
||||||
DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3init_cm:0048:10"),
|
DT_CLK(NULL, "usb_tll_hs_usb_ch2_clk", "l3init-clkctrl:0048:10"),
|
||||||
DT_CLK(NULL, "utmi_p1_gfclk", "l3init_cm:0038:24"),
|
DT_CLK(NULL, "utmi_p1_gfclk", "l3init-clkctrl:0038:24"),
|
||||||
DT_CLK(NULL, "utmi_p2_gfclk", "l3init_cm:0038:25"),
|
DT_CLK(NULL, "utmi_p2_gfclk", "l3init-clkctrl:0038:25"),
|
||||||
{ .node_name = NULL },
|
{ .node_name = NULL },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@@ -511,10 +511,6 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
|
|||||||
char *c;
|
char *c;
|
||||||
u16 soc_mask = 0;
|
u16 soc_mask = 0;
|
||||||
|
|
||||||
if (!(ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) &&
|
|
||||||
of_node_name_eq(node, "clk"))
|
|
||||||
ti_clk_features.flags |= TI_CLK_CLKCTRL_COMPAT;
|
|
||||||
|
|
||||||
addrp = of_get_address(node, 0, NULL, NULL);
|
addrp = of_get_address(node, 0, NULL, NULL);
|
||||||
addr = (u32)of_translate_address(node, addrp);
|
addr = (u32)of_translate_address(node, addrp);
|
||||||
|
|
||||||
|
|||||||
@@ -944,6 +944,11 @@ static int dw_axi_dma_chan_slave_config(struct dma_chan *dchan,
|
|||||||
static void axi_chan_dump_lli(struct axi_dma_chan *chan,
|
static void axi_chan_dump_lli(struct axi_dma_chan *chan,
|
||||||
struct axi_dma_hw_desc *desc)
|
struct axi_dma_hw_desc *desc)
|
||||||
{
|
{
|
||||||
|
if (!desc->lli) {
|
||||||
|
dev_err(dchan2dev(&chan->vc.chan), "NULL LLI\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
dev_err(dchan2dev(&chan->vc.chan),
|
dev_err(dchan2dev(&chan->vc.chan),
|
||||||
"SAR: 0x%llx DAR: 0x%llx LLP: 0x%llx BTS 0x%x CTL: 0x%x:%08x",
|
"SAR: 0x%llx DAR: 0x%llx LLP: 0x%llx BTS 0x%x CTL: 0x%x:%08x",
|
||||||
le64_to_cpu(desc->lli->sar),
|
le64_to_cpu(desc->lli->sar),
|
||||||
@@ -1011,6 +1016,11 @@ static void axi_chan_block_xfer_complete(struct axi_dma_chan *chan)
|
|||||||
|
|
||||||
/* The completed descriptor currently is in the head of vc list */
|
/* The completed descriptor currently is in the head of vc list */
|
||||||
vd = vchan_next_desc(&chan->vc);
|
vd = vchan_next_desc(&chan->vc);
|
||||||
|
if (!vd) {
|
||||||
|
dev_err(chan2dev(chan), "BUG: %s, IRQ with no descriptors\n",
|
||||||
|
axi_chan_name(chan));
|
||||||
|
goto out;
|
||||||
|
}
|
||||||
|
|
||||||
if (chan->cyclic) {
|
if (chan->cyclic) {
|
||||||
desc = vd_to_axi_desc(vd);
|
desc = vd_to_axi_desc(vd);
|
||||||
@@ -1040,6 +1050,7 @@ static void axi_chan_block_xfer_complete(struct axi_dma_chan *chan)
|
|||||||
axi_chan_start_first_queued(chan);
|
axi_chan_start_first_queued(chan);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
out:
|
||||||
spin_unlock_irqrestore(&chan->vc.lock, flags);
|
spin_unlock_irqrestore(&chan->vc.lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1236,11 +1236,8 @@ static int sprd_dma_remove(struct platform_device *pdev)
|
|||||||
{
|
{
|
||||||
struct sprd_dma_dev *sdev = platform_get_drvdata(pdev);
|
struct sprd_dma_dev *sdev = platform_get_drvdata(pdev);
|
||||||
struct sprd_dma_chn *c, *cn;
|
struct sprd_dma_chn *c, *cn;
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = pm_runtime_get_sync(&pdev->dev);
|
pm_runtime_get_sync(&pdev->dev);
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
/* explicitly free the irq */
|
/* explicitly free the irq */
|
||||||
if (sdev->irq > 0)
|
if (sdev->irq > 0)
|
||||||
|
|||||||
@@ -500,7 +500,7 @@ static struct stream_encoder *dcn303_stream_encoder_create(enum engine_id eng_id
|
|||||||
int afmt_inst;
|
int afmt_inst;
|
||||||
|
|
||||||
/* Mapping of VPG, AFMT, DME register blocks to DIO block instance */
|
/* Mapping of VPG, AFMT, DME register blocks to DIO block instance */
|
||||||
if (eng_id <= ENGINE_ID_DIGE) {
|
if (eng_id <= ENGINE_ID_DIGB) {
|
||||||
vpg_inst = eng_id;
|
vpg_inst = eng_id;
|
||||||
afmt_inst = eng_id;
|
afmt_inst = eng_id;
|
||||||
} else
|
} else
|
||||||
|
|||||||
@@ -142,8 +142,6 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss)
|
|||||||
|
|
||||||
drm_kms_helper_poll_init(drm);
|
drm_kms_helper_poll_init(drm);
|
||||||
|
|
||||||
drm_bridge_connector_enable_hpd(kms->connector);
|
|
||||||
|
|
||||||
ret = drm_dev_register(drm, 0);
|
ret = drm_dev_register(drm, 0);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto cleanup_crtc;
|
goto cleanup_crtc;
|
||||||
|
|||||||
@@ -114,8 +114,11 @@ static bool meson_vpu_has_available_connectors(struct device *dev)
|
|||||||
for_each_endpoint_of_node(dev->of_node, ep) {
|
for_each_endpoint_of_node(dev->of_node, ep) {
|
||||||
/* If the endpoint node exists, consider it enabled */
|
/* If the endpoint node exists, consider it enabled */
|
||||||
remote = of_graph_get_remote_port(ep);
|
remote = of_graph_get_remote_port(ep);
|
||||||
if (remote)
|
if (remote) {
|
||||||
|
of_node_put(remote);
|
||||||
|
of_node_put(ep);
|
||||||
return true;
|
return true;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return false;
|
return false;
|
||||||
|
|||||||
@@ -469,17 +469,17 @@ void meson_viu_init(struct meson_drm *priv)
|
|||||||
priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE));
|
priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE));
|
||||||
|
|
||||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
||||||
writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) |
|
u32 val = (u32)VIU_OSD_BLEND_REORDER(0, 1) |
|
||||||
VIU_OSD_BLEND_REORDER(1, 0) |
|
(u32)VIU_OSD_BLEND_REORDER(1, 0) |
|
||||||
VIU_OSD_BLEND_REORDER(2, 0) |
|
(u32)VIU_OSD_BLEND_REORDER(2, 0) |
|
||||||
VIU_OSD_BLEND_REORDER(3, 0) |
|
(u32)VIU_OSD_BLEND_REORDER(3, 0) |
|
||||||
VIU_OSD_BLEND_DIN_EN(1) |
|
(u32)VIU_OSD_BLEND_DIN_EN(1) |
|
||||||
VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 |
|
(u32)VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 |
|
||||||
VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 |
|
(u32)VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 |
|
||||||
VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 |
|
(u32)VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 |
|
||||||
VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) |
|
(u32)VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) |
|
||||||
VIU_OSD_BLEND_HOLD_LINES(4),
|
(u32)VIU_OSD_BLEND_HOLD_LINES(4);
|
||||||
priv->io_base + _REG(VIU_OSD_BLEND_CTRL));
|
writel_relaxed(val, priv->io_base + _REG(VIU_OSD_BLEND_CTRL));
|
||||||
|
|
||||||
writel_relaxed(OSD_BLEND_PATH_SEL_ENABLE,
|
writel_relaxed(OSD_BLEND_PATH_SEL_ENABLE,
|
||||||
priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
|
priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
|
||||||
|
|||||||
@@ -2605,6 +2605,27 @@ nv172_chipset = {
|
|||||||
.fifo = { 0x00000001, ga102_fifo_new },
|
.fifo = { 0x00000001, ga102_fifo_new },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const struct nvkm_device_chip
|
||||||
|
nv173_chipset = {
|
||||||
|
.name = "GA103",
|
||||||
|
.bar = { 0x00000001, tu102_bar_new },
|
||||||
|
.bios = { 0x00000001, nvkm_bios_new },
|
||||||
|
.devinit = { 0x00000001, ga100_devinit_new },
|
||||||
|
.fb = { 0x00000001, ga102_fb_new },
|
||||||
|
.gpio = { 0x00000001, ga102_gpio_new },
|
||||||
|
.i2c = { 0x00000001, gm200_i2c_new },
|
||||||
|
.imem = { 0x00000001, nv50_instmem_new },
|
||||||
|
.mc = { 0x00000001, ga100_mc_new },
|
||||||
|
.mmu = { 0x00000001, tu102_mmu_new },
|
||||||
|
.pci = { 0x00000001, gp100_pci_new },
|
||||||
|
.privring = { 0x00000001, gm200_privring_new },
|
||||||
|
.timer = { 0x00000001, gk20a_timer_new },
|
||||||
|
.top = { 0x00000001, ga100_top_new },
|
||||||
|
.disp = { 0x00000001, ga102_disp_new },
|
||||||
|
.dma = { 0x00000001, gv100_dma_new },
|
||||||
|
.fifo = { 0x00000001, ga102_fifo_new },
|
||||||
|
};
|
||||||
|
|
||||||
static const struct nvkm_device_chip
|
static const struct nvkm_device_chip
|
||||||
nv174_chipset = {
|
nv174_chipset = {
|
||||||
.name = "GA104",
|
.name = "GA104",
|
||||||
@@ -3092,6 +3113,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
|
|||||||
case 0x167: device->chip = &nv167_chipset; break;
|
case 0x167: device->chip = &nv167_chipset; break;
|
||||||
case 0x168: device->chip = &nv168_chipset; break;
|
case 0x168: device->chip = &nv168_chipset; break;
|
||||||
case 0x172: device->chip = &nv172_chipset; break;
|
case 0x172: device->chip = &nv172_chipset; break;
|
||||||
|
case 0x173: device->chip = &nv173_chipset; break;
|
||||||
case 0x174: device->chip = &nv174_chipset; break;
|
case 0x174: device->chip = &nv174_chipset; break;
|
||||||
case 0x176: device->chip = &nv176_chipset; break;
|
case 0x176: device->chip = &nv176_chipset; break;
|
||||||
case 0x177: device->chip = &nv177_chipset; break;
|
case 0x177: device->chip = &nv177_chipset; break;
|
||||||
|
|||||||
@@ -531,7 +531,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
|
|||||||
struct drm_display_mode *mode)
|
struct drm_display_mode *mode)
|
||||||
{
|
{
|
||||||
struct mipi_dsi_device *device = dsi->device;
|
struct mipi_dsi_device *device = dsi->device;
|
||||||
unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8;
|
int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8;
|
||||||
u16 hbp = 0, hfp = 0, hsa = 0, hblk = 0, vblk = 0;
|
u16 hbp = 0, hfp = 0, hsa = 0, hblk = 0, vblk = 0;
|
||||||
u32 basic_ctl = 0;
|
u32 basic_ctl = 0;
|
||||||
size_t bytes;
|
size_t bytes;
|
||||||
@@ -555,7 +555,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
|
|||||||
* (4 bytes). Its minimal size is therefore 10 bytes
|
* (4 bytes). Its minimal size is therefore 10 bytes
|
||||||
*/
|
*/
|
||||||
#define HSA_PACKET_OVERHEAD 10
|
#define HSA_PACKET_OVERHEAD 10
|
||||||
hsa = max((unsigned int)HSA_PACKET_OVERHEAD,
|
hsa = max(HSA_PACKET_OVERHEAD,
|
||||||
(mode->hsync_end - mode->hsync_start) * Bpp - HSA_PACKET_OVERHEAD);
|
(mode->hsync_end - mode->hsync_start) * Bpp - HSA_PACKET_OVERHEAD);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -564,7 +564,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
|
|||||||
* therefore 6 bytes
|
* therefore 6 bytes
|
||||||
*/
|
*/
|
||||||
#define HBP_PACKET_OVERHEAD 6
|
#define HBP_PACKET_OVERHEAD 6
|
||||||
hbp = max((unsigned int)HBP_PACKET_OVERHEAD,
|
hbp = max(HBP_PACKET_OVERHEAD,
|
||||||
(mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
|
(mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -574,7 +574,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
|
|||||||
* 16 bytes
|
* 16 bytes
|
||||||
*/
|
*/
|
||||||
#define HFP_PACKET_OVERHEAD 16
|
#define HFP_PACKET_OVERHEAD 16
|
||||||
hfp = max((unsigned int)HFP_PACKET_OVERHEAD,
|
hfp = max(HFP_PACKET_OVERHEAD,
|
||||||
(mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD);
|
(mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -583,7 +583,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
|
|||||||
* bytes). Its minimal size is therefore 10 bytes.
|
* bytes). Its minimal size is therefore 10 bytes.
|
||||||
*/
|
*/
|
||||||
#define HBLK_PACKET_OVERHEAD 10
|
#define HBLK_PACKET_OVERHEAD 10
|
||||||
hblk = max((unsigned int)HBLK_PACKET_OVERHEAD,
|
hblk = max(HBLK_PACKET_OVERHEAD,
|
||||||
(mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp -
|
(mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp -
|
||||||
HBLK_PACKET_OVERHEAD);
|
HBLK_PACKET_OVERHEAD);
|
||||||
|
|
||||||
|
|||||||
@@ -987,7 +987,7 @@ int ttm_bo_validate(struct ttm_buffer_object *bo,
|
|||||||
/*
|
/*
|
||||||
* We might need to add a TTM.
|
* We might need to add a TTM.
|
||||||
*/
|
*/
|
||||||
if (bo->resource->mem_type == TTM_PL_SYSTEM) {
|
if (!bo->resource || bo->resource->mem_type == TTM_PL_SYSTEM) {
|
||||||
ret = ttm_tt_create(bo, true);
|
ret = ttm_tt_create(bo, true);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|||||||
@@ -194,6 +194,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app);
|
|||||||
#define MT_CLS_WIN_8_FORCE_MULTI_INPUT 0x0015
|
#define MT_CLS_WIN_8_FORCE_MULTI_INPUT 0x0015
|
||||||
#define MT_CLS_WIN_8_DISABLE_WAKEUP 0x0016
|
#define MT_CLS_WIN_8_DISABLE_WAKEUP 0x0016
|
||||||
#define MT_CLS_WIN_8_NO_STICKY_FINGERS 0x0017
|
#define MT_CLS_WIN_8_NO_STICKY_FINGERS 0x0017
|
||||||
|
#define MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU 0x0018
|
||||||
|
|
||||||
/* vendor specific classes */
|
/* vendor specific classes */
|
||||||
#define MT_CLS_3M 0x0101
|
#define MT_CLS_3M 0x0101
|
||||||
@@ -286,6 +287,15 @@ static const struct mt_class mt_classes[] = {
|
|||||||
MT_QUIRK_WIN8_PTP_BUTTONS |
|
MT_QUIRK_WIN8_PTP_BUTTONS |
|
||||||
MT_QUIRK_FORCE_MULTI_INPUT,
|
MT_QUIRK_FORCE_MULTI_INPUT,
|
||||||
.export_all_inputs = true },
|
.export_all_inputs = true },
|
||||||
|
{ .name = MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU,
|
||||||
|
.quirks = MT_QUIRK_IGNORE_DUPLICATES |
|
||||||
|
MT_QUIRK_HOVERING |
|
||||||
|
MT_QUIRK_CONTACT_CNT_ACCURATE |
|
||||||
|
MT_QUIRK_STICKY_FINGERS |
|
||||||
|
MT_QUIRK_WIN8_PTP_BUTTONS |
|
||||||
|
MT_QUIRK_FORCE_MULTI_INPUT |
|
||||||
|
MT_QUIRK_NOT_SEEN_MEANS_UP,
|
||||||
|
.export_all_inputs = true },
|
||||||
{ .name = MT_CLS_WIN_8_DISABLE_WAKEUP,
|
{ .name = MT_CLS_WIN_8_DISABLE_WAKEUP,
|
||||||
.quirks = MT_QUIRK_ALWAYS_VALID |
|
.quirks = MT_QUIRK_ALWAYS_VALID |
|
||||||
MT_QUIRK_IGNORE_DUPLICATES |
|
MT_QUIRK_IGNORE_DUPLICATES |
|
||||||
@@ -783,6 +793,7 @@ static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi,
|
|||||||
case HID_DG_CONFIDENCE:
|
case HID_DG_CONFIDENCE:
|
||||||
if ((cls->name == MT_CLS_WIN_8 ||
|
if ((cls->name == MT_CLS_WIN_8 ||
|
||||||
cls->name == MT_CLS_WIN_8_FORCE_MULTI_INPUT ||
|
cls->name == MT_CLS_WIN_8_FORCE_MULTI_INPUT ||
|
||||||
|
cls->name == MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU ||
|
||||||
cls->name == MT_CLS_WIN_8_DISABLE_WAKEUP) &&
|
cls->name == MT_CLS_WIN_8_DISABLE_WAKEUP) &&
|
||||||
(field->application == HID_DG_TOUCHPAD ||
|
(field->application == HID_DG_TOUCHPAD ||
|
||||||
field->application == HID_DG_TOUCHSCREEN))
|
field->application == HID_DG_TOUCHSCREEN))
|
||||||
@@ -2033,7 +2044,7 @@ static const struct hid_device_id mt_devices[] = {
|
|||||||
USB_DEVICE_ID_LENOVO_X1_TAB3) },
|
USB_DEVICE_ID_LENOVO_X1_TAB3) },
|
||||||
|
|
||||||
/* Lenovo X12 TAB Gen 1 */
|
/* Lenovo X12 TAB Gen 1 */
|
||||||
{ .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT,
|
{ .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU,
|
||||||
HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH_WIN_8,
|
HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH_WIN_8,
|
||||||
USB_VENDOR_ID_LENOVO,
|
USB_VENDOR_ID_LENOVO,
|
||||||
USB_DEVICE_ID_LENOVO_X12_TAB) },
|
USB_DEVICE_ID_LENOVO_X12_TAB) },
|
||||||
|
|||||||
@@ -7,6 +7,7 @@
|
|||||||
#define _CORESIGHT_CORESIGHT_ETM_H
|
#define _CORESIGHT_CORESIGHT_ETM_H
|
||||||
|
|
||||||
#include <asm/local.h>
|
#include <asm/local.h>
|
||||||
|
#include <linux/const.h>
|
||||||
#include <linux/spinlock.h>
|
#include <linux/spinlock.h>
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include "coresight-priv.h"
|
#include "coresight-priv.h"
|
||||||
@@ -417,7 +418,7 @@
|
|||||||
({ \
|
({ \
|
||||||
u64 __val; \
|
u64 __val; \
|
||||||
\
|
\
|
||||||
if (__builtin_constant_p((offset))) \
|
if (__is_constexpr((offset))) \
|
||||||
__val = read_etm4x_sysreg_const_offset((offset)); \
|
__val = read_etm4x_sysreg_const_offset((offset)); \
|
||||||
else \
|
else \
|
||||||
__val = etm4x_sysreg_read((offset), true, (_64bit)); \
|
__val = etm4x_sysreg_read((offset), true, (_64bit)); \
|
||||||
|
|||||||
@@ -1487,9 +1487,7 @@ static int i2c_imx_remove(struct platform_device *pdev)
|
|||||||
struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
|
struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
|
||||||
int irq, ret;
|
int irq, ret;
|
||||||
|
|
||||||
ret = pm_runtime_resume_and_get(&pdev->dev);
|
ret = pm_runtime_get_sync(&pdev->dev);
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
/* remove adapter */
|
/* remove adapter */
|
||||||
dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
|
dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
|
||||||
@@ -1498,17 +1496,21 @@ static int i2c_imx_remove(struct platform_device *pdev)
|
|||||||
if (i2c_imx->dma)
|
if (i2c_imx->dma)
|
||||||
i2c_imx_dma_free(i2c_imx);
|
i2c_imx_dma_free(i2c_imx);
|
||||||
|
|
||||||
/* setup chip registers to defaults */
|
if (ret == 0) {
|
||||||
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR);
|
/* setup chip registers to defaults */
|
||||||
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IFDR);
|
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR);
|
||||||
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
|
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IFDR);
|
||||||
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
|
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
|
||||||
|
imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
|
||||||
|
clk_disable(i2c_imx->clk);
|
||||||
|
}
|
||||||
|
|
||||||
clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb);
|
clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb);
|
||||||
irq = platform_get_irq(pdev, 0);
|
irq = platform_get_irq(pdev, 0);
|
||||||
if (irq >= 0)
|
if (irq >= 0)
|
||||||
free_irq(irq, i2c_imx);
|
free_irq(irq, i2c_imx);
|
||||||
clk_disable_unprepare(i2c_imx->clk);
|
|
||||||
|
clk_unprepare(i2c_imx->clk);
|
||||||
|
|
||||||
pm_runtime_put_noidle(&pdev->dev);
|
pm_runtime_put_noidle(&pdev->dev);
|
||||||
pm_runtime_disable(&pdev->dev);
|
pm_runtime_disable(&pdev->dev);
|
||||||
|
|||||||
@@ -103,6 +103,12 @@ enum rxe_device_param {
|
|||||||
RXE_INFLIGHT_SKBS_PER_QP_HIGH = 64,
|
RXE_INFLIGHT_SKBS_PER_QP_HIGH = 64,
|
||||||
RXE_INFLIGHT_SKBS_PER_QP_LOW = 16,
|
RXE_INFLIGHT_SKBS_PER_QP_LOW = 16,
|
||||||
|
|
||||||
|
/* Max number of interations of each tasklet
|
||||||
|
* before yielding the cpu to let other
|
||||||
|
* work make progress
|
||||||
|
*/
|
||||||
|
RXE_MAX_ITERATIONS = 1024,
|
||||||
|
|
||||||
/* Delay before calling arbiter timer */
|
/* Delay before calling arbiter timer */
|
||||||
RXE_NSEC_ARB_TIMER_DELAY = 200,
|
RXE_NSEC_ARB_TIMER_DELAY = 200,
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,7 @@
|
|||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/hardirq.h>
|
#include <linux/hardirq.h>
|
||||||
|
|
||||||
#include "rxe_task.h"
|
#include "rxe.h"
|
||||||
|
|
||||||
int __rxe_do_task(struct rxe_task *task)
|
int __rxe_do_task(struct rxe_task *task)
|
||||||
|
|
||||||
@@ -34,6 +34,7 @@ void rxe_do_task(struct tasklet_struct *t)
|
|||||||
int ret;
|
int ret;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
struct rxe_task *task = from_tasklet(task, t, tasklet);
|
struct rxe_task *task = from_tasklet(task, t, tasklet);
|
||||||
|
unsigned int iterations = RXE_MAX_ITERATIONS;
|
||||||
|
|
||||||
spin_lock_irqsave(&task->state_lock, flags);
|
spin_lock_irqsave(&task->state_lock, flags);
|
||||||
switch (task->state) {
|
switch (task->state) {
|
||||||
@@ -62,13 +63,20 @@ void rxe_do_task(struct tasklet_struct *t)
|
|||||||
spin_lock_irqsave(&task->state_lock, flags);
|
spin_lock_irqsave(&task->state_lock, flags);
|
||||||
switch (task->state) {
|
switch (task->state) {
|
||||||
case TASK_STATE_BUSY:
|
case TASK_STATE_BUSY:
|
||||||
if (ret)
|
if (ret) {
|
||||||
task->state = TASK_STATE_START;
|
task->state = TASK_STATE_START;
|
||||||
else
|
} else if (iterations--) {
|
||||||
cont = 1;
|
cont = 1;
|
||||||
|
} else {
|
||||||
|
/* reschedule the tasklet and exit
|
||||||
|
* the loop to give up the cpu
|
||||||
|
*/
|
||||||
|
tasklet_schedule(&task->tasklet);
|
||||||
|
task->state = TASK_STATE_START;
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* soneone tried to run the task since the last time we called
|
/* someone tried to run the task since the last time we called
|
||||||
* func, so we will call one more time regardless of the
|
* func, so we will call one more time regardless of the
|
||||||
* return value
|
* return value
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -220,6 +220,7 @@ static int exc3000_vendor_data_request(struct exc3000_data *data, u8 *request,
|
|||||||
{
|
{
|
||||||
u8 buf[EXC3000_LEN_VENDOR_REQUEST] = { 0x67, 0x00, 0x42, 0x00, 0x03 };
|
u8 buf[EXC3000_LEN_VENDOR_REQUEST] = { 0x67, 0x00, 0x42, 0x00, 0x03 };
|
||||||
int ret;
|
int ret;
|
||||||
|
unsigned long time_left;
|
||||||
|
|
||||||
mutex_lock(&data->query_lock);
|
mutex_lock(&data->query_lock);
|
||||||
|
|
||||||
@@ -233,9 +234,9 @@ static int exc3000_vendor_data_request(struct exc3000_data *data, u8 *request,
|
|||||||
goto out_unlock;
|
goto out_unlock;
|
||||||
|
|
||||||
if (response) {
|
if (response) {
|
||||||
ret = wait_for_completion_timeout(&data->wait_event,
|
time_left = wait_for_completion_timeout(&data->wait_event,
|
||||||
timeout * HZ);
|
timeout * HZ);
|
||||||
if (ret <= 0) {
|
if (time_left == 0) {
|
||||||
ret = -ETIMEDOUT;
|
ret = -ETIMEDOUT;
|
||||||
goto out_unlock;
|
goto out_unlock;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -884,17 +884,15 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
|
|||||||
|
|
||||||
/* TTBR */
|
/* TTBR */
|
||||||
paddr = virt_to_phys(data->pgd);
|
paddr = virt_to_phys(data->pgd);
|
||||||
cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S |
|
if (arm_v7s_is_mtk_enabled(cfg))
|
||||||
(cfg->coherent_walk ? (ARM_V7S_TTBR_NOS |
|
cfg->arm_v7s_cfg.ttbr = paddr | upper_32_bits(paddr);
|
||||||
ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) |
|
else
|
||||||
ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA)) :
|
cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S |
|
||||||
(ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) |
|
(cfg->coherent_walk ? (ARM_V7S_TTBR_NOS |
|
||||||
ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC)));
|
ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) |
|
||||||
|
ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA)) :
|
||||||
if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT)
|
(ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) |
|
||||||
cfg->arm_v7s_cfg.ttbr = (paddr & GENMASK(31, 7)) |
|
ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC)));
|
||||||
upper_32_bits(paddr);
|
|
||||||
|
|
||||||
return &data->iop;
|
return &data->iop;
|
||||||
|
|
||||||
out_free_data:
|
out_free_data:
|
||||||
|
|||||||
@@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void)
|
|||||||
lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
|
lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
|
||||||
|
|
||||||
/* Disable COP interrupts */
|
/* Disable COP interrupts */
|
||||||
writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
|
writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_COP_IER_CLR);
|
||||||
|
|
||||||
/* Disable CPU interrupts */
|
/* Disable CPU interrupts */
|
||||||
writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
|
writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_CPU_IER_CLR);
|
||||||
|
|
||||||
/* Enable the wakeup sources of ictlr */
|
/* Enable the wakeup sources of ictlr */
|
||||||
writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
|
writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
|
||||||
@@ -172,12 +172,12 @@ static void tegra_ictlr_resume(void)
|
|||||||
|
|
||||||
writel_relaxed(lic->cpu_iep[i],
|
writel_relaxed(lic->cpu_iep[i],
|
||||||
ictlr + ICTLR_CPU_IEP_CLASS);
|
ictlr + ICTLR_CPU_IEP_CLASS);
|
||||||
writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
|
writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_CPU_IER_CLR);
|
||||||
writel_relaxed(lic->cpu_ier[i],
|
writel_relaxed(lic->cpu_ier[i],
|
||||||
ictlr + ICTLR_CPU_IER_SET);
|
ictlr + ICTLR_CPU_IER_SET);
|
||||||
writel_relaxed(lic->cop_iep[i],
|
writel_relaxed(lic->cop_iep[i],
|
||||||
ictlr + ICTLR_COP_IEP_CLASS);
|
ictlr + ICTLR_COP_IEP_CLASS);
|
||||||
writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
|
writel_relaxed(GENMASK(31, 0), ictlr + ICTLR_COP_IER_CLR);
|
||||||
writel_relaxed(lic->cop_ier[i],
|
writel_relaxed(lic->cop_ier[i],
|
||||||
ictlr + ICTLR_COP_IER_SET);
|
ictlr + ICTLR_COP_IER_SET);
|
||||||
}
|
}
|
||||||
@@ -312,7 +312,7 @@ static int __init tegra_ictlr_init(struct device_node *node,
|
|||||||
lic->base[i] = base;
|
lic->base[i] = base;
|
||||||
|
|
||||||
/* Disable all interrupts */
|
/* Disable all interrupts */
|
||||||
writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR);
|
writel_relaxed(GENMASK(31, 0), base + ICTLR_CPU_IER_CLR);
|
||||||
/* All interrupts target IRQ */
|
/* All interrupts target IRQ */
|
||||||
writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS);
|
writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS);
|
||||||
|
|
||||||
|
|||||||
@@ -9467,6 +9467,7 @@ void md_reap_sync_thread(struct mddev *mddev)
|
|||||||
wake_up(&resync_wait);
|
wake_up(&resync_wait);
|
||||||
/* flag recovery needed just to double check */
|
/* flag recovery needed just to double check */
|
||||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||||
|
sysfs_notify_dirent_safe(mddev->sysfs_completed);
|
||||||
sysfs_notify_dirent_safe(mddev->sysfs_action);
|
sysfs_notify_dirent_safe(mddev->sysfs_action);
|
||||||
md_new_event(mddev);
|
md_new_event(mddev);
|
||||||
if (mddev->event_work.func)
|
if (mddev->event_work.func)
|
||||||
|
|||||||
@@ -2864,10 +2864,10 @@ static void raid5_end_write_request(struct bio *bi)
|
|||||||
if (!test_and_clear_bit(R5_DOUBLE_LOCKED, &sh->dev[i].flags))
|
if (!test_and_clear_bit(R5_DOUBLE_LOCKED, &sh->dev[i].flags))
|
||||||
clear_bit(R5_LOCKED, &sh->dev[i].flags);
|
clear_bit(R5_LOCKED, &sh->dev[i].flags);
|
||||||
set_bit(STRIPE_HANDLE, &sh->state);
|
set_bit(STRIPE_HANDLE, &sh->state);
|
||||||
raid5_release_stripe(sh);
|
|
||||||
|
|
||||||
if (sh->batch_head && sh != sh->batch_head)
|
if (sh->batch_head && sh != sh->batch_head)
|
||||||
raid5_release_stripe(sh->batch_head);
|
raid5_release_stripe(sh->batch_head);
|
||||||
|
raid5_release_stripe(sh);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void raid5_error(struct mddev *mddev, struct md_rdev *rdev)
|
static void raid5_error(struct mddev *mddev, struct md_rdev *rdev)
|
||||||
|
|||||||
@@ -875,7 +875,7 @@ static int vcodec_domains_get(struct venus_core *core)
|
|||||||
}
|
}
|
||||||
|
|
||||||
skip_pmdomains:
|
skip_pmdomains:
|
||||||
if (!core->has_opp_table)
|
if (!core->res->opp_pmdomain)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
/* Attach the power domain for setting performance state */
|
/* Attach the power domain for setting performance state */
|
||||||
@@ -1007,6 +1007,10 @@ static int core_get_v4(struct venus_core *core)
|
|||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
ret = vcodec_domains_get(core);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
if (core->res->opp_pmdomain) {
|
if (core->res->opp_pmdomain) {
|
||||||
ret = devm_pm_opp_of_add_table(dev);
|
ret = devm_pm_opp_of_add_table(dev);
|
||||||
if (!ret) {
|
if (!ret) {
|
||||||
@@ -1017,10 +1021,6 @@ static int core_get_v4(struct venus_core *core)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = vcodec_domains_get(core);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -349,6 +349,7 @@ int afu_allocate_irqs(struct cxl_context *ctx, u32 count)
|
|||||||
|
|
||||||
out:
|
out:
|
||||||
cxl_ops->release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
|
cxl_ops->release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
|
||||||
|
bitmap_free(ctx->irq_bitmap);
|
||||||
afu_irq_name_free(ctx);
|
afu_irq_name_free(ctx);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -3318,19 +3318,19 @@ static void gaudi_init_nic_qman(struct hl_device *hdev, u32 nic_offset,
|
|||||||
u32 nic_qm_err_cfg, irq_handler_offset;
|
u32 nic_qm_err_cfg, irq_handler_offset;
|
||||||
u32 q_off;
|
u32 q_off;
|
||||||
|
|
||||||
mtr_base_en_lo = lower_32_bits(CFG_BASE +
|
mtr_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) +
|
||||||
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
||||||
mtr_base_en_hi = upper_32_bits(CFG_BASE +
|
mtr_base_en_hi = upper_32_bits(CFG_BASE +
|
||||||
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
||||||
so_base_en_lo = lower_32_bits(CFG_BASE +
|
so_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) +
|
||||||
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
||||||
so_base_en_hi = upper_32_bits(CFG_BASE +
|
so_base_en_hi = upper_32_bits(CFG_BASE +
|
||||||
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
||||||
mtr_base_ws_lo = lower_32_bits(CFG_BASE +
|
mtr_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) +
|
||||||
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
||||||
mtr_base_ws_hi = upper_32_bits(CFG_BASE +
|
mtr_base_ws_hi = upper_32_bits(CFG_BASE +
|
||||||
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0);
|
||||||
so_base_ws_lo = lower_32_bits(CFG_BASE +
|
so_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) +
|
||||||
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
||||||
so_base_ws_hi = upper_32_bits(CFG_BASE +
|
so_base_ws_hi = upper_32_bits(CFG_BASE +
|
||||||
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0);
|
||||||
@@ -5744,15 +5744,17 @@ static int gaudi_parse_cb_no_ext_queue(struct hl_device *hdev,
|
|||||||
{
|
{
|
||||||
struct asic_fixed_properties *asic_prop = &hdev->asic_prop;
|
struct asic_fixed_properties *asic_prop = &hdev->asic_prop;
|
||||||
struct gaudi_device *gaudi = hdev->asic_specific;
|
struct gaudi_device *gaudi = hdev->asic_specific;
|
||||||
u32 nic_mask_q_id = 1 << (HW_CAP_NIC_SHIFT +
|
u32 nic_queue_offset, nic_mask_q_id;
|
||||||
((parser->hw_queue_id - GAUDI_QUEUE_ID_NIC_0_0) >> 2));
|
|
||||||
|
|
||||||
if ((parser->hw_queue_id >= GAUDI_QUEUE_ID_NIC_0_0) &&
|
if ((parser->hw_queue_id >= GAUDI_QUEUE_ID_NIC_0_0) &&
|
||||||
(parser->hw_queue_id <= GAUDI_QUEUE_ID_NIC_9_3) &&
|
(parser->hw_queue_id <= GAUDI_QUEUE_ID_NIC_9_3)) {
|
||||||
(!(gaudi->hw_cap_initialized & nic_mask_q_id))) {
|
nic_queue_offset = parser->hw_queue_id - GAUDI_QUEUE_ID_NIC_0_0;
|
||||||
dev_err(hdev->dev, "h/w queue %d is disabled\n",
|
nic_mask_q_id = 1 << (HW_CAP_NIC_SHIFT + (nic_queue_offset >> 2));
|
||||||
parser->hw_queue_id);
|
|
||||||
return -EINVAL;
|
if (!(gaudi->hw_cap_initialized & nic_mask_q_id)) {
|
||||||
|
dev_err(hdev->dev, "h/w queue %d is disabled\n", parser->hw_queue_id);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* For internal queue jobs just check if CB address is valid */
|
/* For internal queue jobs just check if CB address is valid */
|
||||||
|
|||||||
@@ -9,43 +9,38 @@
|
|||||||
|
|
||||||
static struct class *uacce_class;
|
static struct class *uacce_class;
|
||||||
static dev_t uacce_devt;
|
static dev_t uacce_devt;
|
||||||
static DEFINE_MUTEX(uacce_mutex);
|
|
||||||
static DEFINE_XARRAY_ALLOC(uacce_xa);
|
static DEFINE_XARRAY_ALLOC(uacce_xa);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If the parent driver or the device disappears, the queue state is invalid and
|
||||||
|
* ops are not usable anymore.
|
||||||
|
*/
|
||||||
|
static bool uacce_queue_is_valid(struct uacce_queue *q)
|
||||||
|
{
|
||||||
|
return q->state == UACCE_Q_INIT || q->state == UACCE_Q_STARTED;
|
||||||
|
}
|
||||||
|
|
||||||
static int uacce_start_queue(struct uacce_queue *q)
|
static int uacce_start_queue(struct uacce_queue *q)
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret;
|
||||||
|
|
||||||
mutex_lock(&uacce_mutex);
|
if (q->state != UACCE_Q_INIT)
|
||||||
|
return -EINVAL;
|
||||||
if (q->state != UACCE_Q_INIT) {
|
|
||||||
ret = -EINVAL;
|
|
||||||
goto out_with_lock;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (q->uacce->ops->start_queue) {
|
if (q->uacce->ops->start_queue) {
|
||||||
ret = q->uacce->ops->start_queue(q);
|
ret = q->uacce->ops->start_queue(q);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
goto out_with_lock;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
q->state = UACCE_Q_STARTED;
|
q->state = UACCE_Q_STARTED;
|
||||||
|
return 0;
|
||||||
out_with_lock:
|
|
||||||
mutex_unlock(&uacce_mutex);
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int uacce_put_queue(struct uacce_queue *q)
|
static int uacce_put_queue(struct uacce_queue *q)
|
||||||
{
|
{
|
||||||
struct uacce_device *uacce = q->uacce;
|
struct uacce_device *uacce = q->uacce;
|
||||||
|
|
||||||
mutex_lock(&uacce_mutex);
|
|
||||||
|
|
||||||
if (q->state == UACCE_Q_ZOMBIE)
|
|
||||||
goto out;
|
|
||||||
|
|
||||||
if ((q->state == UACCE_Q_STARTED) && uacce->ops->stop_queue)
|
if ((q->state == UACCE_Q_STARTED) && uacce->ops->stop_queue)
|
||||||
uacce->ops->stop_queue(q);
|
uacce->ops->stop_queue(q);
|
||||||
|
|
||||||
@@ -54,8 +49,6 @@ static int uacce_put_queue(struct uacce_queue *q)
|
|||||||
uacce->ops->put_queue(q);
|
uacce->ops->put_queue(q);
|
||||||
|
|
||||||
q->state = UACCE_Q_ZOMBIE;
|
q->state = UACCE_Q_ZOMBIE;
|
||||||
out:
|
|
||||||
mutex_unlock(&uacce_mutex);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@@ -65,20 +58,36 @@ static long uacce_fops_unl_ioctl(struct file *filep,
|
|||||||
{
|
{
|
||||||
struct uacce_queue *q = filep->private_data;
|
struct uacce_queue *q = filep->private_data;
|
||||||
struct uacce_device *uacce = q->uacce;
|
struct uacce_device *uacce = q->uacce;
|
||||||
|
long ret = -ENXIO;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* uacce->ops->ioctl() may take the mmap_lock when copying arg to/from
|
||||||
|
* user. Avoid a circular lock dependency with uacce_fops_mmap(), which
|
||||||
|
* gets called with mmap_lock held, by taking uacce->mutex instead of
|
||||||
|
* q->mutex. Doing this in uacce_fops_mmap() is not possible because
|
||||||
|
* uacce_fops_open() calls iommu_sva_bind_device(), which takes
|
||||||
|
* mmap_lock, while holding uacce->mutex.
|
||||||
|
*/
|
||||||
|
mutex_lock(&uacce->mutex);
|
||||||
|
if (!uacce_queue_is_valid(q))
|
||||||
|
goto out_unlock;
|
||||||
|
|
||||||
switch (cmd) {
|
switch (cmd) {
|
||||||
case UACCE_CMD_START_Q:
|
case UACCE_CMD_START_Q:
|
||||||
return uacce_start_queue(q);
|
ret = uacce_start_queue(q);
|
||||||
|
break;
|
||||||
case UACCE_CMD_PUT_Q:
|
case UACCE_CMD_PUT_Q:
|
||||||
return uacce_put_queue(q);
|
ret = uacce_put_queue(q);
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
if (!uacce->ops->ioctl)
|
if (uacce->ops->ioctl)
|
||||||
return -EINVAL;
|
ret = uacce->ops->ioctl(q, cmd, arg);
|
||||||
|
else
|
||||||
return uacce->ops->ioctl(q, cmd, arg);
|
ret = -EINVAL;
|
||||||
}
|
}
|
||||||
|
out_unlock:
|
||||||
|
mutex_unlock(&uacce->mutex);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_COMPAT
|
#ifdef CONFIG_COMPAT
|
||||||
@@ -136,6 +145,13 @@ static int uacce_fops_open(struct inode *inode, struct file *filep)
|
|||||||
if (!q)
|
if (!q)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
mutex_lock(&uacce->mutex);
|
||||||
|
|
||||||
|
if (!uacce->parent) {
|
||||||
|
ret = -EINVAL;
|
||||||
|
goto out_with_mem;
|
||||||
|
}
|
||||||
|
|
||||||
ret = uacce_bind_queue(uacce, q);
|
ret = uacce_bind_queue(uacce, q);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto out_with_mem;
|
goto out_with_mem;
|
||||||
@@ -152,10 +168,9 @@ static int uacce_fops_open(struct inode *inode, struct file *filep)
|
|||||||
filep->private_data = q;
|
filep->private_data = q;
|
||||||
uacce->inode = inode;
|
uacce->inode = inode;
|
||||||
q->state = UACCE_Q_INIT;
|
q->state = UACCE_Q_INIT;
|
||||||
|
mutex_init(&q->mutex);
|
||||||
mutex_lock(&uacce->queues_lock);
|
|
||||||
list_add(&q->list, &uacce->queues);
|
list_add(&q->list, &uacce->queues);
|
||||||
mutex_unlock(&uacce->queues_lock);
|
mutex_unlock(&uacce->mutex);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
@@ -163,18 +178,20 @@ out_with_bond:
|
|||||||
uacce_unbind_queue(q);
|
uacce_unbind_queue(q);
|
||||||
out_with_mem:
|
out_with_mem:
|
||||||
kfree(q);
|
kfree(q);
|
||||||
|
mutex_unlock(&uacce->mutex);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int uacce_fops_release(struct inode *inode, struct file *filep)
|
static int uacce_fops_release(struct inode *inode, struct file *filep)
|
||||||
{
|
{
|
||||||
struct uacce_queue *q = filep->private_data;
|
struct uacce_queue *q = filep->private_data;
|
||||||
|
struct uacce_device *uacce = q->uacce;
|
||||||
|
|
||||||
mutex_lock(&q->uacce->queues_lock);
|
mutex_lock(&uacce->mutex);
|
||||||
list_del(&q->list);
|
|
||||||
mutex_unlock(&q->uacce->queues_lock);
|
|
||||||
uacce_put_queue(q);
|
uacce_put_queue(q);
|
||||||
uacce_unbind_queue(q);
|
uacce_unbind_queue(q);
|
||||||
|
list_del(&q->list);
|
||||||
|
mutex_unlock(&uacce->mutex);
|
||||||
kfree(q);
|
kfree(q);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -217,10 +234,9 @@ static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma)
|
|||||||
vma->vm_private_data = q;
|
vma->vm_private_data = q;
|
||||||
qfr->type = type;
|
qfr->type = type;
|
||||||
|
|
||||||
mutex_lock(&uacce_mutex);
|
mutex_lock(&q->mutex);
|
||||||
|
if (!uacce_queue_is_valid(q)) {
|
||||||
if (q->state != UACCE_Q_INIT && q->state != UACCE_Q_STARTED) {
|
ret = -ENXIO;
|
||||||
ret = -EINVAL;
|
|
||||||
goto out_with_lock;
|
goto out_with_lock;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -248,12 +264,12 @@ static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma)
|
|||||||
}
|
}
|
||||||
|
|
||||||
q->qfrs[type] = qfr;
|
q->qfrs[type] = qfr;
|
||||||
mutex_unlock(&uacce_mutex);
|
mutex_unlock(&q->mutex);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
out_with_lock:
|
out_with_lock:
|
||||||
mutex_unlock(&uacce_mutex);
|
mutex_unlock(&q->mutex);
|
||||||
kfree(qfr);
|
kfree(qfr);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@@ -262,12 +278,20 @@ static __poll_t uacce_fops_poll(struct file *file, poll_table *wait)
|
|||||||
{
|
{
|
||||||
struct uacce_queue *q = file->private_data;
|
struct uacce_queue *q = file->private_data;
|
||||||
struct uacce_device *uacce = q->uacce;
|
struct uacce_device *uacce = q->uacce;
|
||||||
|
__poll_t ret = 0;
|
||||||
|
|
||||||
|
mutex_lock(&q->mutex);
|
||||||
|
if (!uacce_queue_is_valid(q))
|
||||||
|
goto out_unlock;
|
||||||
|
|
||||||
poll_wait(file, &q->wait, wait);
|
poll_wait(file, &q->wait, wait);
|
||||||
if (uacce->ops->is_q_updated && uacce->ops->is_q_updated(q))
|
|
||||||
return EPOLLIN | EPOLLRDNORM;
|
|
||||||
|
|
||||||
return 0;
|
if (uacce->ops->is_q_updated && uacce->ops->is_q_updated(q))
|
||||||
|
ret = EPOLLIN | EPOLLRDNORM;
|
||||||
|
|
||||||
|
out_unlock:
|
||||||
|
mutex_unlock(&q->mutex);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct file_operations uacce_fops = {
|
static const struct file_operations uacce_fops = {
|
||||||
@@ -450,7 +474,7 @@ struct uacce_device *uacce_alloc(struct device *parent,
|
|||||||
goto err_with_uacce;
|
goto err_with_uacce;
|
||||||
|
|
||||||
INIT_LIST_HEAD(&uacce->queues);
|
INIT_LIST_HEAD(&uacce->queues);
|
||||||
mutex_init(&uacce->queues_lock);
|
mutex_init(&uacce->mutex);
|
||||||
device_initialize(&uacce->dev);
|
device_initialize(&uacce->dev);
|
||||||
uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id);
|
uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id);
|
||||||
uacce->dev.class = uacce_class;
|
uacce->dev.class = uacce_class;
|
||||||
@@ -507,13 +531,23 @@ void uacce_remove(struct uacce_device *uacce)
|
|||||||
if (uacce->inode)
|
if (uacce->inode)
|
||||||
unmap_mapping_range(uacce->inode->i_mapping, 0, 0, 1);
|
unmap_mapping_range(uacce->inode->i_mapping, 0, 0, 1);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* uacce_fops_open() may be running concurrently, even after we remove
|
||||||
|
* the cdev. Holding uacce->mutex ensures that open() does not obtain a
|
||||||
|
* removed uacce device.
|
||||||
|
*/
|
||||||
|
mutex_lock(&uacce->mutex);
|
||||||
/* ensure no open queue remains */
|
/* ensure no open queue remains */
|
||||||
mutex_lock(&uacce->queues_lock);
|
|
||||||
list_for_each_entry_safe(q, next_q, &uacce->queues, list) {
|
list_for_each_entry_safe(q, next_q, &uacce->queues, list) {
|
||||||
|
/*
|
||||||
|
* Taking q->mutex ensures that fops do not use the defunct
|
||||||
|
* uacce->ops after the queue is disabled.
|
||||||
|
*/
|
||||||
|
mutex_lock(&q->mutex);
|
||||||
uacce_put_queue(q);
|
uacce_put_queue(q);
|
||||||
|
mutex_unlock(&q->mutex);
|
||||||
uacce_unbind_queue(q);
|
uacce_unbind_queue(q);
|
||||||
}
|
}
|
||||||
mutex_unlock(&uacce->queues_lock);
|
|
||||||
|
|
||||||
/* disable sva now since no opened queues */
|
/* disable sva now since no opened queues */
|
||||||
uacce_disable_sva(uacce);
|
uacce_disable_sva(uacce);
|
||||||
@@ -521,6 +555,13 @@ void uacce_remove(struct uacce_device *uacce)
|
|||||||
if (uacce->cdev)
|
if (uacce->cdev)
|
||||||
cdev_device_del(uacce->cdev, &uacce->dev);
|
cdev_device_del(uacce->cdev, &uacce->dev);
|
||||||
xa_erase(&uacce_xa, uacce->dev_id);
|
xa_erase(&uacce_xa, uacce->dev_id);
|
||||||
|
/*
|
||||||
|
* uacce exists as long as there are open fds, but ops will be freed
|
||||||
|
* now. Ensure that bugs cause NULL deref rather than use-after-free.
|
||||||
|
*/
|
||||||
|
uacce->ops = NULL;
|
||||||
|
uacce->parent = NULL;
|
||||||
|
mutex_unlock(&uacce->mutex);
|
||||||
put_device(&uacce->dev);
|
put_device(&uacce->dev);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(uacce_remove);
|
EXPORT_SYMBOL_GPL(uacce_remove);
|
||||||
|
|||||||
@@ -1172,8 +1172,10 @@ static int meson_mmc_probe(struct platform_device *pdev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
ret = device_reset_optional(&pdev->dev);
|
ret = device_reset_optional(&pdev->dev);
|
||||||
if (ret)
|
if (ret) {
|
||||||
return dev_err_probe(&pdev->dev, ret, "device reset failed\n");
|
dev_err_probe(&pdev->dev, ret, "device reset failed\n");
|
||||||
|
goto free_host;
|
||||||
|
}
|
||||||
|
|
||||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
host->regs = devm_ioremap_resource(&pdev->dev, res);
|
host->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||||
|
|||||||
@@ -648,7 +648,7 @@ static int pxamci_probe(struct platform_device *pdev)
|
|||||||
|
|
||||||
ret = pxamci_of_init(pdev, mmc);
|
ret = pxamci_of_init(pdev, mmc);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
goto out;
|
||||||
|
|
||||||
host = mmc_priv(mmc);
|
host = mmc_priv(mmc);
|
||||||
host->mmc = mmc;
|
host->mmc = mmc;
|
||||||
@@ -672,7 +672,7 @@ static int pxamci_probe(struct platform_device *pdev)
|
|||||||
|
|
||||||
ret = pxamci_init_ocr(host);
|
ret = pxamci_init_ocr(host);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
goto out;
|
||||||
|
|
||||||
mmc->caps = 0;
|
mmc->caps = 0;
|
||||||
host->cmdat = 0;
|
host->cmdat = 0;
|
||||||
|
|||||||
@@ -51,9 +51,6 @@
|
|||||||
#define HOST_MODE_GEN3_32BIT (HOST_MODE_GEN3_WMODE | HOST_MODE_GEN3_BUSWIDTH)
|
#define HOST_MODE_GEN3_32BIT (HOST_MODE_GEN3_WMODE | HOST_MODE_GEN3_BUSWIDTH)
|
||||||
#define HOST_MODE_GEN3_64BIT 0
|
#define HOST_MODE_GEN3_64BIT 0
|
||||||
|
|
||||||
#define CTL_SDIF_MODE 0xe6
|
|
||||||
#define SDIF_MODE_HS400 BIT(0)
|
|
||||||
|
|
||||||
#define SDHI_VER_GEN2_SDR50 0x490c
|
#define SDHI_VER_GEN2_SDR50 0x490c
|
||||||
#define SDHI_VER_RZ_A1 0x820b
|
#define SDHI_VER_RZ_A1 0x820b
|
||||||
/* very old datasheets said 0x490c for SDR104, too. They are wrong! */
|
/* very old datasheets said 0x490c for SDR104, too. They are wrong! */
|
||||||
@@ -550,23 +547,25 @@ static void renesas_sdhi_scc_reset(struct tmio_mmc_host *host, struct renesas_sd
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* only populated for TMIO_MMC_MIN_RCAR2 */
|
/* only populated for TMIO_MMC_MIN_RCAR2 */
|
||||||
static void renesas_sdhi_reset(struct tmio_mmc_host *host)
|
static void renesas_sdhi_reset(struct tmio_mmc_host *host, bool preserve)
|
||||||
{
|
{
|
||||||
struct renesas_sdhi *priv = host_to_priv(host);
|
struct renesas_sdhi *priv = host_to_priv(host);
|
||||||
int ret;
|
int ret;
|
||||||
u16 val;
|
u16 val;
|
||||||
|
|
||||||
if (priv->rstc) {
|
if (!preserve) {
|
||||||
reset_control_reset(priv->rstc);
|
if (priv->rstc) {
|
||||||
/* Unknown why but without polling reset status, it will hang */
|
reset_control_reset(priv->rstc);
|
||||||
read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100,
|
/* Unknown why but without polling reset status, it will hang */
|
||||||
false, priv->rstc);
|
read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100,
|
||||||
/* At least SDHI_VER_GEN2_SDR50 needs manual release of reset */
|
false, priv->rstc);
|
||||||
sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
|
/* At least SDHI_VER_GEN2_SDR50 needs manual release of reset */
|
||||||
priv->needs_adjust_hs400 = false;
|
sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
|
||||||
renesas_sdhi_set_clock(host, host->clk_cache);
|
priv->needs_adjust_hs400 = false;
|
||||||
} else if (priv->scc_ctl) {
|
renesas_sdhi_set_clock(host, host->clk_cache);
|
||||||
renesas_sdhi_scc_reset(host, priv);
|
} else if (priv->scc_ctl) {
|
||||||
|
renesas_sdhi_scc_reset(host, priv);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (sd_ctrl_read16(host, CTL_VERSION) >= SDHI_VER_GEN3_SD) {
|
if (sd_ctrl_read16(host, CTL_VERSION) >= SDHI_VER_GEN3_SD) {
|
||||||
|
|||||||
@@ -75,7 +75,7 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
|
|||||||
tmio_mmc_clk_start(host);
|
tmio_mmc_clk_start(host);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void tmio_mmc_reset(struct tmio_mmc_host *host)
|
static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
|
||||||
{
|
{
|
||||||
sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
|
sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
|
||||||
usleep_range(10000, 11000);
|
usleep_range(10000, 11000);
|
||||||
|
|||||||
@@ -42,6 +42,7 @@
|
|||||||
#define CTL_DMA_ENABLE 0xd8
|
#define CTL_DMA_ENABLE 0xd8
|
||||||
#define CTL_RESET_SD 0xe0
|
#define CTL_RESET_SD 0xe0
|
||||||
#define CTL_VERSION 0xe2
|
#define CTL_VERSION 0xe2
|
||||||
|
#define CTL_SDIF_MODE 0xe6 /* only known on R-Car 2+ */
|
||||||
|
|
||||||
/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
|
/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
|
||||||
#define TMIO_STOP_STP BIT(0)
|
#define TMIO_STOP_STP BIT(0)
|
||||||
@@ -98,6 +99,9 @@
|
|||||||
/* Definitions for values the CTL_DMA_ENABLE register can take */
|
/* Definitions for values the CTL_DMA_ENABLE register can take */
|
||||||
#define DMA_ENABLE_DMASDRW BIT(1)
|
#define DMA_ENABLE_DMASDRW BIT(1)
|
||||||
|
|
||||||
|
/* Definitions for values the CTL_SDIF_MODE register can take */
|
||||||
|
#define SDIF_MODE_HS400 BIT(0) /* only known on R-Car 2+ */
|
||||||
|
|
||||||
/* Define some IRQ masks */
|
/* Define some IRQ masks */
|
||||||
/* This is the mask used at reset by the chip */
|
/* This is the mask used at reset by the chip */
|
||||||
#define TMIO_MASK_ALL 0x837f031d
|
#define TMIO_MASK_ALL 0x837f031d
|
||||||
@@ -181,7 +185,7 @@ struct tmio_mmc_host {
|
|||||||
int (*multi_io_quirk)(struct mmc_card *card,
|
int (*multi_io_quirk)(struct mmc_card *card,
|
||||||
unsigned int direction, int blk_size);
|
unsigned int direction, int blk_size);
|
||||||
int (*write16_hook)(struct tmio_mmc_host *host, int addr);
|
int (*write16_hook)(struct tmio_mmc_host *host, int addr);
|
||||||
void (*reset)(struct tmio_mmc_host *host);
|
void (*reset)(struct tmio_mmc_host *host, bool preserve);
|
||||||
bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq);
|
bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq);
|
||||||
void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
|
void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
|
||||||
unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
|
unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
|
||||||
|
|||||||
@@ -179,8 +179,17 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
|
|||||||
sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
|
sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void tmio_mmc_reset(struct tmio_mmc_host *host)
|
static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
|
||||||
{
|
{
|
||||||
|
u16 card_opt, clk_ctrl, sdif_mode;
|
||||||
|
|
||||||
|
if (preserve) {
|
||||||
|
card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
|
||||||
|
clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
|
||||||
|
if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
|
||||||
|
sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
|
||||||
|
}
|
||||||
|
|
||||||
/* FIXME - should we set stop clock reg here */
|
/* FIXME - should we set stop clock reg here */
|
||||||
sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
|
sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
|
||||||
usleep_range(10000, 11000);
|
usleep_range(10000, 11000);
|
||||||
@@ -190,7 +199,7 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
|
|||||||
tmio_mmc_abort_dma(host);
|
tmio_mmc_abort_dma(host);
|
||||||
|
|
||||||
if (host->reset)
|
if (host->reset)
|
||||||
host->reset(host);
|
host->reset(host, preserve);
|
||||||
|
|
||||||
sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
|
sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
|
||||||
host->sdcard_irq_mask = host->sdcard_irq_mask_all;
|
host->sdcard_irq_mask = host->sdcard_irq_mask_all;
|
||||||
@@ -206,6 +215,13 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
|
|||||||
sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
|
sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (preserve) {
|
||||||
|
sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
|
||||||
|
sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
|
||||||
|
if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
|
||||||
|
sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
|
||||||
|
}
|
||||||
|
|
||||||
if (host->mmc->card)
|
if (host->mmc->card)
|
||||||
mmc_retune_needed(host->mmc);
|
mmc_retune_needed(host->mmc);
|
||||||
}
|
}
|
||||||
@@ -248,7 +264,7 @@ static void tmio_mmc_reset_work(struct work_struct *work)
|
|||||||
|
|
||||||
spin_unlock_irqrestore(&host->lock, flags);
|
spin_unlock_irqrestore(&host->lock, flags);
|
||||||
|
|
||||||
tmio_mmc_reset(host);
|
tmio_mmc_reset(host, true);
|
||||||
|
|
||||||
/* Ready for new calls */
|
/* Ready for new calls */
|
||||||
host->mrq = NULL;
|
host->mrq = NULL;
|
||||||
@@ -961,7 +977,7 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|||||||
tmio_mmc_power_off(host);
|
tmio_mmc_power_off(host);
|
||||||
/* For R-Car Gen2+, we need to reset SDHI specific SCC */
|
/* For R-Car Gen2+, we need to reset SDHI specific SCC */
|
||||||
if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
|
if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
|
||||||
tmio_mmc_reset(host);
|
tmio_mmc_reset(host, false);
|
||||||
|
|
||||||
host->set_clock(host, 0);
|
host->set_clock(host, 0);
|
||||||
break;
|
break;
|
||||||
@@ -1189,7 +1205,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
|
|||||||
_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
|
_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
|
||||||
|
|
||||||
_host->set_clock(_host, 0);
|
_host->set_clock(_host, 0);
|
||||||
tmio_mmc_reset(_host);
|
tmio_mmc_reset(_host, false);
|
||||||
|
|
||||||
spin_lock_init(&_host->lock);
|
spin_lock_init(&_host->lock);
|
||||||
mutex_init(&_host->ios_lock);
|
mutex_init(&_host->ios_lock);
|
||||||
@@ -1285,7 +1301,7 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
|
|||||||
struct tmio_mmc_host *host = dev_get_drvdata(dev);
|
struct tmio_mmc_host *host = dev_get_drvdata(dev);
|
||||||
|
|
||||||
tmio_mmc_clk_enable(host);
|
tmio_mmc_clk_enable(host);
|
||||||
tmio_mmc_reset(host);
|
tmio_mmc_reset(host, false);
|
||||||
|
|
||||||
if (host->clk_cache)
|
if (host->clk_cache)
|
||||||
host->set_clock(host, host->clk_cache);
|
host->set_clock(host, host->clk_cache);
|
||||||
|
|||||||
@@ -1074,9 +1074,6 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
|
|||||||
|
|
||||||
mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
|
mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
|
||||||
|
|
||||||
/* mask out flags we don't care about */
|
|
||||||
intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
|
|
||||||
|
|
||||||
/* receive buffer 0 */
|
/* receive buffer 0 */
|
||||||
if (intf & CANINTF_RX0IF) {
|
if (intf & CANINTF_RX0IF) {
|
||||||
mcp251x_hw_rx(spi, 0);
|
mcp251x_hw_rx(spi, 0);
|
||||||
@@ -1086,6 +1083,18 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
|
|||||||
if (mcp251x_is_2510(spi))
|
if (mcp251x_is_2510(spi))
|
||||||
mcp251x_write_bits(spi, CANINTF,
|
mcp251x_write_bits(spi, CANINTF,
|
||||||
CANINTF_RX0IF, 0x00);
|
CANINTF_RX0IF, 0x00);
|
||||||
|
|
||||||
|
/* check if buffer 1 is already known to be full, no need to re-read */
|
||||||
|
if (!(intf & CANINTF_RX1IF)) {
|
||||||
|
u8 intf1, eflag1;
|
||||||
|
|
||||||
|
/* intf needs to be read again to avoid a race condition */
|
||||||
|
mcp251x_read_2regs(spi, CANINTF, &intf1, &eflag1);
|
||||||
|
|
||||||
|
/* combine flags from both operations for error handling */
|
||||||
|
intf |= intf1;
|
||||||
|
eflag |= eflag1;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* receive buffer 1 */
|
/* receive buffer 1 */
|
||||||
@@ -1096,6 +1105,9 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
|
|||||||
clear_intf |= CANINTF_RX1IF;
|
clear_intf |= CANINTF_RX1IF;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* mask out flags we don't care about */
|
||||||
|
intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
|
||||||
|
|
||||||
/* any error or tx interrupt we need to clear? */
|
/* any error or tx interrupt we need to clear? */
|
||||||
if (intf & (CANINTF_ERR | CANINTF_TX))
|
if (intf & (CANINTF_ERR | CANINTF_TX))
|
||||||
clear_intf |= intf & (CANINTF_ERR | CANINTF_TX);
|
clear_intf |= intf & (CANINTF_ERR | CANINTF_TX);
|
||||||
|
|||||||
@@ -194,7 +194,7 @@ struct __packed ems_cpc_msg {
|
|||||||
__le32 ts_sec; /* timestamp in seconds */
|
__le32 ts_sec; /* timestamp in seconds */
|
||||||
__le32 ts_nsec; /* timestamp in nano seconds */
|
__le32 ts_nsec; /* timestamp in nano seconds */
|
||||||
|
|
||||||
union {
|
union __packed {
|
||||||
u8 generic[64];
|
u8 generic[64];
|
||||||
struct cpc_can_msg can_msg;
|
struct cpc_can_msg can_msg;
|
||||||
struct cpc_can_params can_params;
|
struct cpc_can_params can_params;
|
||||||
|
|||||||
@@ -759,6 +759,9 @@ static int ksz9477_port_fdb_dump(struct dsa_switch *ds, int port,
|
|||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (!(ksz_data & ALU_VALID))
|
||||||
|
continue;
|
||||||
|
|
||||||
/* read ALU table */
|
/* read ALU table */
|
||||||
ksz9477_read_table(dev, alu_table);
|
ksz9477_read_table(dev, alu_table);
|
||||||
|
|
||||||
|
|||||||
@@ -118,6 +118,9 @@ static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)
|
|||||||
int addr = REG_PORT(p);
|
int addr = REG_PORT(p);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
if (dsa_is_unused_port(priv->ds, p))
|
||||||
|
return 0;
|
||||||
|
|
||||||
/* Do not force flow control, disable Ingress and Egress
|
/* Do not force flow control, disable Ingress and Egress
|
||||||
* Header tagging, disable VLAN tunneling, and set the port
|
* Header tagging, disable VLAN tunneling, and set the port
|
||||||
* state to Forwarding. Additionally, if this is the CPU
|
* state to Forwarding. Additionally, if this is the CPU
|
||||||
|
|||||||
@@ -578,7 +578,8 @@ static const struct ocelot_stat_layout vsc9959_stats_layout[] = {
|
|||||||
{ .offset = 0x87, .name = "tx_frames_below_65_octets", },
|
{ .offset = 0x87, .name = "tx_frames_below_65_octets", },
|
||||||
{ .offset = 0x88, .name = "tx_frames_65_to_127_octets", },
|
{ .offset = 0x88, .name = "tx_frames_65_to_127_octets", },
|
||||||
{ .offset = 0x89, .name = "tx_frames_128_255_octets", },
|
{ .offset = 0x89, .name = "tx_frames_128_255_octets", },
|
||||||
{ .offset = 0x8B, .name = "tx_frames_256_511_octets", },
|
{ .offset = 0x8A, .name = "tx_frames_256_511_octets", },
|
||||||
|
{ .offset = 0x8B, .name = "tx_frames_512_1023_octets", },
|
||||||
{ .offset = 0x8C, .name = "tx_frames_1024_1526_octets", },
|
{ .offset = 0x8C, .name = "tx_frames_1024_1526_octets", },
|
||||||
{ .offset = 0x8D, .name = "tx_frames_over_1526_octets", },
|
{ .offset = 0x8D, .name = "tx_frames_over_1526_octets", },
|
||||||
{ .offset = 0x8E, .name = "tx_yellow_prio_0", },
|
{ .offset = 0x8E, .name = "tx_yellow_prio_0", },
|
||||||
|
|||||||
@@ -93,7 +93,7 @@ static int sja1105_setup_devlink_regions(struct dsa_switch *ds)
|
|||||||
|
|
||||||
region = dsa_devlink_region_create(ds, ops, 1, size);
|
region = dsa_devlink_region_create(ds, ops, 1, size);
|
||||||
if (IS_ERR(region)) {
|
if (IS_ERR(region)) {
|
||||||
while (i-- >= 0)
|
while (--i >= 0)
|
||||||
dsa_devlink_region_destroy(priv->regions[i]);
|
dsa_devlink_region_destroy(priv->regions[i]);
|
||||||
return PTR_ERR(region);
|
return PTR_ERR(region);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -265,12 +265,10 @@ static void aq_nic_service_timer_cb(struct timer_list *t)
|
|||||||
static void aq_nic_polling_timer_cb(struct timer_list *t)
|
static void aq_nic_polling_timer_cb(struct timer_list *t)
|
||||||
{
|
{
|
||||||
struct aq_nic_s *self = from_timer(self, t, polling_timer);
|
struct aq_nic_s *self = from_timer(self, t, polling_timer);
|
||||||
struct aq_vec_s *aq_vec = NULL;
|
|
||||||
unsigned int i = 0U;
|
unsigned int i = 0U;
|
||||||
|
|
||||||
for (i = 0U, aq_vec = self->aq_vec[0];
|
for (i = 0U; self->aq_vecs > i; ++i)
|
||||||
self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
|
aq_vec_isr(i, (void *)self->aq_vec[i]);
|
||||||
aq_vec_isr(i, (void *)aq_vec);
|
|
||||||
|
|
||||||
mod_timer(&self->polling_timer, jiffies +
|
mod_timer(&self->polling_timer, jiffies +
|
||||||
AQ_CFG_POLLING_TIMER_INTERVAL);
|
AQ_CFG_POLLING_TIMER_INTERVAL);
|
||||||
@@ -872,7 +870,6 @@ int aq_nic_get_regs_count(struct aq_nic_s *self)
|
|||||||
|
|
||||||
u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
|
u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
|
||||||
{
|
{
|
||||||
struct aq_vec_s *aq_vec = NULL;
|
|
||||||
struct aq_stats_s *stats;
|
struct aq_stats_s *stats;
|
||||||
unsigned int count = 0U;
|
unsigned int count = 0U;
|
||||||
unsigned int i = 0U;
|
unsigned int i = 0U;
|
||||||
@@ -922,11 +919,11 @@ u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
|
|||||||
data += i;
|
data += i;
|
||||||
|
|
||||||
for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
|
for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
|
||||||
for (i = 0U, aq_vec = self->aq_vec[0];
|
for (i = 0U; self->aq_vecs > i; ++i) {
|
||||||
aq_vec && self->aq_vecs > i;
|
if (!self->aq_vec[i])
|
||||||
++i, aq_vec = self->aq_vec[i]) {
|
break;
|
||||||
data += count;
|
data += count;
|
||||||
count = aq_vec_get_sw_stats(aq_vec, tc, data);
|
count = aq_vec_get_sw_stats(self->aq_vec[i], tc, data);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1240,7 +1237,6 @@ int aq_nic_set_loopback(struct aq_nic_s *self)
|
|||||||
|
|
||||||
int aq_nic_stop(struct aq_nic_s *self)
|
int aq_nic_stop(struct aq_nic_s *self)
|
||||||
{
|
{
|
||||||
struct aq_vec_s *aq_vec = NULL;
|
|
||||||
unsigned int i = 0U;
|
unsigned int i = 0U;
|
||||||
|
|
||||||
netif_tx_disable(self->ndev);
|
netif_tx_disable(self->ndev);
|
||||||
@@ -1258,9 +1254,8 @@ int aq_nic_stop(struct aq_nic_s *self)
|
|||||||
|
|
||||||
aq_ptp_irq_free(self);
|
aq_ptp_irq_free(self);
|
||||||
|
|
||||||
for (i = 0U, aq_vec = self->aq_vec[0];
|
for (i = 0U; self->aq_vecs > i; ++i)
|
||||||
self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
|
aq_vec_stop(self->aq_vec[i]);
|
||||||
aq_vec_stop(aq_vec);
|
|
||||||
|
|
||||||
aq_ptp_ring_stop(self);
|
aq_ptp_ring_stop(self);
|
||||||
|
|
||||||
|
|||||||
@@ -189,8 +189,8 @@ static netdev_tx_t bgmac_dma_tx_add(struct bgmac *bgmac,
|
|||||||
}
|
}
|
||||||
|
|
||||||
slot->skb = skb;
|
slot->skb = skb;
|
||||||
ring->end += nr_frags + 1;
|
|
||||||
netdev_sent_queue(net_dev, skb->len);
|
netdev_sent_queue(net_dev, skb->len);
|
||||||
|
ring->end += nr_frags + 1;
|
||||||
|
|
||||||
wmb();
|
wmb();
|
||||||
|
|
||||||
|
|||||||
@@ -361,6 +361,9 @@ int bcmgenet_mii_probe(struct net_device *dev)
|
|||||||
if (priv->internal_phy && !GENET_IS_V5(priv))
|
if (priv->internal_phy && !GENET_IS_V5(priv))
|
||||||
dev->phydev->irq = PHY_MAC_INTERRUPT;
|
dev->phydev->irq = PHY_MAC_INTERRUPT;
|
||||||
|
|
||||||
|
/* Indicate that the MAC is responsible for PHY PM */
|
||||||
|
dev->phydev->mac_managed_pm = true;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1389,8 +1389,8 @@ static int dpaa2_eth_add_bufs(struct dpaa2_eth_priv *priv,
|
|||||||
buf_array[i] = addr;
|
buf_array[i] = addr;
|
||||||
|
|
||||||
/* tracing point */
|
/* tracing point */
|
||||||
trace_dpaa2_eth_buf_seed(priv->net_dev,
|
trace_dpaa2_eth_buf_seed(priv->net_dev, page_address(page),
|
||||||
page, DPAA2_ETH_RX_BUF_RAW_SIZE,
|
DPAA2_ETH_RX_BUF_RAW_SIZE,
|
||||||
addr, priv->rx_buf_size,
|
addr, priv->rx_buf_size,
|
||||||
bpid);
|
bpid);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -136,11 +136,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
|
|||||||
* NSEC_PER_SEC - ts.tv_nsec. Add the remaining nanoseconds
|
* NSEC_PER_SEC - ts.tv_nsec. Add the remaining nanoseconds
|
||||||
* to current timer would be next second.
|
* to current timer would be next second.
|
||||||
*/
|
*/
|
||||||
tempval = readl(fep->hwp + FEC_ATIME_CTRL);
|
tempval = fep->cc.read(&fep->cc);
|
||||||
tempval |= FEC_T_CTRL_CAPTURE;
|
|
||||||
writel(tempval, fep->hwp + FEC_ATIME_CTRL);
|
|
||||||
|
|
||||||
tempval = readl(fep->hwp + FEC_ATIME);
|
|
||||||
/* Convert the ptp local counter to 1588 timestamp */
|
/* Convert the ptp local counter to 1588 timestamp */
|
||||||
ns = timecounter_cyc2time(&fep->tc, tempval);
|
ns = timecounter_cyc2time(&fep->tc, tempval);
|
||||||
ts = ns_to_timespec64(ns);
|
ts = ns_to_timespec64(ns);
|
||||||
|
|||||||
@@ -383,7 +383,9 @@ static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
|
|||||||
set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
|
set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
|
netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
|
||||||
|
set_bit(__I40E_DOWN_REQUESTED, pf->state);
|
||||||
|
set_bit(__I40E_VSI_DOWN_REQUESTED, vsi->state);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -324,6 +324,7 @@ static enum iavf_status iavf_config_arq_regs(struct iavf_hw *hw)
|
|||||||
static enum iavf_status iavf_init_asq(struct iavf_hw *hw)
|
static enum iavf_status iavf_init_asq(struct iavf_hw *hw)
|
||||||
{
|
{
|
||||||
enum iavf_status ret_code = 0;
|
enum iavf_status ret_code = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
if (hw->aq.asq.count > 0) {
|
if (hw->aq.asq.count > 0) {
|
||||||
/* queue already initialized */
|
/* queue already initialized */
|
||||||
@@ -354,12 +355,17 @@ static enum iavf_status iavf_init_asq(struct iavf_hw *hw)
|
|||||||
/* initialize base registers */
|
/* initialize base registers */
|
||||||
ret_code = iavf_config_asq_regs(hw);
|
ret_code = iavf_config_asq_regs(hw);
|
||||||
if (ret_code)
|
if (ret_code)
|
||||||
goto init_adminq_free_rings;
|
goto init_free_asq_bufs;
|
||||||
|
|
||||||
/* success! */
|
/* success! */
|
||||||
hw->aq.asq.count = hw->aq.num_asq_entries;
|
hw->aq.asq.count = hw->aq.num_asq_entries;
|
||||||
goto init_adminq_exit;
|
goto init_adminq_exit;
|
||||||
|
|
||||||
|
init_free_asq_bufs:
|
||||||
|
for (i = 0; i < hw->aq.num_asq_entries; i++)
|
||||||
|
iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);
|
||||||
|
iavf_free_virt_mem(hw, &hw->aq.asq.dma_head);
|
||||||
|
|
||||||
init_adminq_free_rings:
|
init_adminq_free_rings:
|
||||||
iavf_free_adminq_asq(hw);
|
iavf_free_adminq_asq(hw);
|
||||||
|
|
||||||
@@ -383,6 +389,7 @@ init_adminq_exit:
|
|||||||
static enum iavf_status iavf_init_arq(struct iavf_hw *hw)
|
static enum iavf_status iavf_init_arq(struct iavf_hw *hw)
|
||||||
{
|
{
|
||||||
enum iavf_status ret_code = 0;
|
enum iavf_status ret_code = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
if (hw->aq.arq.count > 0) {
|
if (hw->aq.arq.count > 0) {
|
||||||
/* queue already initialized */
|
/* queue already initialized */
|
||||||
@@ -413,12 +420,16 @@ static enum iavf_status iavf_init_arq(struct iavf_hw *hw)
|
|||||||
/* initialize base registers */
|
/* initialize base registers */
|
||||||
ret_code = iavf_config_arq_regs(hw);
|
ret_code = iavf_config_arq_regs(hw);
|
||||||
if (ret_code)
|
if (ret_code)
|
||||||
goto init_adminq_free_rings;
|
goto init_free_arq_bufs;
|
||||||
|
|
||||||
/* success! */
|
/* success! */
|
||||||
hw->aq.arq.count = hw->aq.num_arq_entries;
|
hw->aq.arq.count = hw->aq.num_arq_entries;
|
||||||
goto init_adminq_exit;
|
goto init_adminq_exit;
|
||||||
|
|
||||||
|
init_free_arq_bufs:
|
||||||
|
for (i = 0; i < hw->aq.num_arq_entries; i++)
|
||||||
|
iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);
|
||||||
|
iavf_free_virt_mem(hw, &hw->aq.arq.dma_head);
|
||||||
init_adminq_free_rings:
|
init_adminq_free_rings:
|
||||||
iavf_free_adminq_arq(hw);
|
iavf_free_adminq_arq(hw);
|
||||||
|
|
||||||
|
|||||||
@@ -2414,12 +2414,15 @@ continue_reset:
|
|||||||
|
|
||||||
return;
|
return;
|
||||||
reset_err:
|
reset_err:
|
||||||
|
if (running) {
|
||||||
|
set_bit(__IAVF_VSI_DOWN, adapter->vsi.state);
|
||||||
|
iavf_free_traffic_irqs(adapter);
|
||||||
|
}
|
||||||
|
iavf_disable_vf(adapter);
|
||||||
|
|
||||||
mutex_unlock(&adapter->client_lock);
|
mutex_unlock(&adapter->client_lock);
|
||||||
mutex_unlock(&adapter->crit_lock);
|
mutex_unlock(&adapter->crit_lock);
|
||||||
if (running)
|
|
||||||
iavf_change_state(adapter, __IAVF_RUNNING);
|
|
||||||
dev_err(&adapter->pdev->dev, "failed to allocate resources during reinit\n");
|
dev_err(&adapter->pdev->dev, "failed to allocate resources during reinit\n");
|
||||||
iavf_close(netdev);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|||||||
@@ -2614,7 +2614,7 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
|
|||||||
else
|
else
|
||||||
status = ice_set_vsi_promisc(hw, vsi_handle,
|
status = ice_set_vsi_promisc(hw, vsi_handle,
|
||||||
promisc_mask, vlan_id);
|
promisc_mask, vlan_id);
|
||||||
if (status)
|
if (status && status != -EEXIST)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -664,6 +664,8 @@ struct igb_adapter {
|
|||||||
struct igb_mac_addr *mac_table;
|
struct igb_mac_addr *mac_table;
|
||||||
struct vf_mac_filter vf_macs;
|
struct vf_mac_filter vf_macs;
|
||||||
struct vf_mac_filter *vf_mac_list;
|
struct vf_mac_filter *vf_mac_list;
|
||||||
|
/* lock for VF resources */
|
||||||
|
spinlock_t vfs_lock;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* flags controlling PTP/1588 function */
|
/* flags controlling PTP/1588 function */
|
||||||
|
|||||||
@@ -3637,6 +3637,7 @@ static int igb_disable_sriov(struct pci_dev *pdev)
|
|||||||
struct net_device *netdev = pci_get_drvdata(pdev);
|
struct net_device *netdev = pci_get_drvdata(pdev);
|
||||||
struct igb_adapter *adapter = netdev_priv(netdev);
|
struct igb_adapter *adapter = netdev_priv(netdev);
|
||||||
struct e1000_hw *hw = &adapter->hw;
|
struct e1000_hw *hw = &adapter->hw;
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
/* reclaim resources allocated to VFs */
|
/* reclaim resources allocated to VFs */
|
||||||
if (adapter->vf_data) {
|
if (adapter->vf_data) {
|
||||||
@@ -3649,12 +3650,13 @@ static int igb_disable_sriov(struct pci_dev *pdev)
|
|||||||
pci_disable_sriov(pdev);
|
pci_disable_sriov(pdev);
|
||||||
msleep(500);
|
msleep(500);
|
||||||
}
|
}
|
||||||
|
spin_lock_irqsave(&adapter->vfs_lock, flags);
|
||||||
kfree(adapter->vf_mac_list);
|
kfree(adapter->vf_mac_list);
|
||||||
adapter->vf_mac_list = NULL;
|
adapter->vf_mac_list = NULL;
|
||||||
kfree(adapter->vf_data);
|
kfree(adapter->vf_data);
|
||||||
adapter->vf_data = NULL;
|
adapter->vf_data = NULL;
|
||||||
adapter->vfs_allocated_count = 0;
|
adapter->vfs_allocated_count = 0;
|
||||||
|
spin_unlock_irqrestore(&adapter->vfs_lock, flags);
|
||||||
wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
|
wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
|
||||||
wrfl();
|
wrfl();
|
||||||
msleep(100);
|
msleep(100);
|
||||||
@@ -3814,7 +3816,9 @@ static void igb_remove(struct pci_dev *pdev)
|
|||||||
igb_release_hw_control(adapter);
|
igb_release_hw_control(adapter);
|
||||||
|
|
||||||
#ifdef CONFIG_PCI_IOV
|
#ifdef CONFIG_PCI_IOV
|
||||||
|
rtnl_lock();
|
||||||
igb_disable_sriov(pdev);
|
igb_disable_sriov(pdev);
|
||||||
|
rtnl_unlock();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
unregister_netdev(netdev);
|
unregister_netdev(netdev);
|
||||||
@@ -3974,6 +3978,9 @@ static int igb_sw_init(struct igb_adapter *adapter)
|
|||||||
|
|
||||||
spin_lock_init(&adapter->nfc_lock);
|
spin_lock_init(&adapter->nfc_lock);
|
||||||
spin_lock_init(&adapter->stats64_lock);
|
spin_lock_init(&adapter->stats64_lock);
|
||||||
|
|
||||||
|
/* init spinlock to avoid concurrency of VF resources */
|
||||||
|
spin_lock_init(&adapter->vfs_lock);
|
||||||
#ifdef CONFIG_PCI_IOV
|
#ifdef CONFIG_PCI_IOV
|
||||||
switch (hw->mac.type) {
|
switch (hw->mac.type) {
|
||||||
case e1000_82576:
|
case e1000_82576:
|
||||||
@@ -7846,8 +7853,10 @@ unlock:
|
|||||||
static void igb_msg_task(struct igb_adapter *adapter)
|
static void igb_msg_task(struct igb_adapter *adapter)
|
||||||
{
|
{
|
||||||
struct e1000_hw *hw = &adapter->hw;
|
struct e1000_hw *hw = &adapter->hw;
|
||||||
|
unsigned long flags;
|
||||||
u32 vf;
|
u32 vf;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&adapter->vfs_lock, flags);
|
||||||
for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
|
for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
|
||||||
/* process any reset requests */
|
/* process any reset requests */
|
||||||
if (!igb_check_for_rst(hw, vf))
|
if (!igb_check_for_rst(hw, vf))
|
||||||
@@ -7861,6 +7870,7 @@ static void igb_msg_task(struct igb_adapter *adapter)
|
|||||||
if (!igb_check_for_ack(hw, vf))
|
if (!igb_check_for_ack(hw, vf))
|
||||||
igb_rcv_ack_from_vf(adapter, vf);
|
igb_rcv_ack_from_vf(adapter, vf);
|
||||||
}
|
}
|
||||||
|
spin_unlock_irqrestore(&adapter->vfs_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|||||||
@@ -2504,6 +2504,12 @@ static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc)
|
|||||||
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NPA);
|
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NPA);
|
||||||
rvu_reset_lmt_map_tbl(rvu, pcifunc);
|
rvu_reset_lmt_map_tbl(rvu, pcifunc);
|
||||||
rvu_detach_rsrcs(rvu, NULL, pcifunc);
|
rvu_detach_rsrcs(rvu, NULL, pcifunc);
|
||||||
|
/* In scenarios where PF/VF drivers detach NIXLF without freeing MCAM
|
||||||
|
* entries, check and free the MCAM entries explicitly to avoid leak.
|
||||||
|
* Since LF is detached use LF number as -1.
|
||||||
|
*/
|
||||||
|
rvu_npc_free_mcam_entries(rvu, pcifunc, -1);
|
||||||
|
|
||||||
mutex_unlock(&rvu->flr_lock);
|
mutex_unlock(&rvu->flr_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1096,6 +1096,9 @@ static void npc_enadis_default_entries(struct rvu *rvu, u16 pcifunc,
|
|||||||
|
|
||||||
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
|
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
|
||||||
{
|
{
|
||||||
|
if (nixlf < 0)
|
||||||
|
return;
|
||||||
|
|
||||||
npc_enadis_default_entries(rvu, pcifunc, nixlf, false);
|
npc_enadis_default_entries(rvu, pcifunc, nixlf, false);
|
||||||
|
|
||||||
/* Delete multicast and promisc MCAM entries */
|
/* Delete multicast and promisc MCAM entries */
|
||||||
@@ -1107,6 +1110,9 @@ void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
|
|||||||
|
|
||||||
void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
|
void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf)
|
||||||
{
|
{
|
||||||
|
if (nixlf < 0)
|
||||||
|
return;
|
||||||
|
|
||||||
/* Enables only broadcast match entry. Promisc/Allmulti are enabled
|
/* Enables only broadcast match entry. Promisc/Allmulti are enabled
|
||||||
* in set_rx_mode mbox handler.
|
* in set_rx_mode mbox handler.
|
||||||
*/
|
*/
|
||||||
@@ -1650,7 +1656,7 @@ static void npc_load_kpu_profile(struct rvu *rvu)
|
|||||||
* Firmware database method.
|
* Firmware database method.
|
||||||
* Default KPU profile.
|
* Default KPU profile.
|
||||||
*/
|
*/
|
||||||
if (!request_firmware(&fw, kpu_profile, rvu->dev)) {
|
if (!request_firmware_direct(&fw, kpu_profile, rvu->dev)) {
|
||||||
dev_info(rvu->dev, "Loading KPU profile from firmware: %s\n",
|
dev_info(rvu->dev, "Loading KPU profile from firmware: %s\n",
|
||||||
kpu_profile);
|
kpu_profile);
|
||||||
rvu->kpu_fwdata = kzalloc(fw->size, GFP_KERNEL);
|
rvu->kpu_fwdata = kzalloc(fw->size, GFP_KERNEL);
|
||||||
@@ -1915,6 +1921,7 @@ static void rvu_npc_hw_init(struct rvu *rvu, int blkaddr)
|
|||||||
|
|
||||||
static void rvu_npc_setup_interfaces(struct rvu *rvu, int blkaddr)
|
static void rvu_npc_setup_interfaces(struct rvu *rvu, int blkaddr)
|
||||||
{
|
{
|
||||||
|
struct npc_mcam_kex *mkex = rvu->kpu.mkex;
|
||||||
struct npc_mcam *mcam = &rvu->hw->mcam;
|
struct npc_mcam *mcam = &rvu->hw->mcam;
|
||||||
struct rvu_hwinfo *hw = rvu->hw;
|
struct rvu_hwinfo *hw = rvu->hw;
|
||||||
u64 nibble_ena, rx_kex, tx_kex;
|
u64 nibble_ena, rx_kex, tx_kex;
|
||||||
@@ -1927,15 +1934,15 @@ static void rvu_npc_setup_interfaces(struct rvu *rvu, int blkaddr)
|
|||||||
mcam->counters.max--;
|
mcam->counters.max--;
|
||||||
mcam->rx_miss_act_cntr = mcam->counters.max;
|
mcam->rx_miss_act_cntr = mcam->counters.max;
|
||||||
|
|
||||||
rx_kex = npc_mkex_default.keyx_cfg[NIX_INTF_RX];
|
rx_kex = mkex->keyx_cfg[NIX_INTF_RX];
|
||||||
tx_kex = npc_mkex_default.keyx_cfg[NIX_INTF_TX];
|
tx_kex = mkex->keyx_cfg[NIX_INTF_TX];
|
||||||
nibble_ena = FIELD_GET(NPC_PARSE_NIBBLE, rx_kex);
|
nibble_ena = FIELD_GET(NPC_PARSE_NIBBLE, rx_kex);
|
||||||
|
|
||||||
nibble_ena = rvu_npc_get_tx_nibble_cfg(rvu, nibble_ena);
|
nibble_ena = rvu_npc_get_tx_nibble_cfg(rvu, nibble_ena);
|
||||||
if (nibble_ena) {
|
if (nibble_ena) {
|
||||||
tx_kex &= ~NPC_PARSE_NIBBLE;
|
tx_kex &= ~NPC_PARSE_NIBBLE;
|
||||||
tx_kex |= FIELD_PREP(NPC_PARSE_NIBBLE, nibble_ena);
|
tx_kex |= FIELD_PREP(NPC_PARSE_NIBBLE, nibble_ena);
|
||||||
npc_mkex_default.keyx_cfg[NIX_INTF_TX] = tx_kex;
|
mkex->keyx_cfg[NIX_INTF_TX] = tx_kex;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Configure RX interfaces */
|
/* Configure RX interfaces */
|
||||||
|
|||||||
@@ -445,7 +445,8 @@ do { \
|
|||||||
NPC_SCAN_HDR(NPC_VLAN_TAG1, NPC_LID_LB, NPC_LT_LB_CTAG, 2, 2);
|
NPC_SCAN_HDR(NPC_VLAN_TAG1, NPC_LID_LB, NPC_LT_LB_CTAG, 2, 2);
|
||||||
NPC_SCAN_HDR(NPC_VLAN_TAG2, NPC_LID_LB, NPC_LT_LB_STAG_QINQ, 2, 2);
|
NPC_SCAN_HDR(NPC_VLAN_TAG2, NPC_LID_LB, NPC_LT_LB_STAG_QINQ, 2, 2);
|
||||||
NPC_SCAN_HDR(NPC_DMAC, NPC_LID_LA, la_ltype, la_start, 6);
|
NPC_SCAN_HDR(NPC_DMAC, NPC_LID_LA, la_ltype, la_start, 6);
|
||||||
NPC_SCAN_HDR(NPC_SMAC, NPC_LID_LA, la_ltype, la_start, 6);
|
/* SMAC follows the DMAC(which is 6 bytes) */
|
||||||
|
NPC_SCAN_HDR(NPC_SMAC, NPC_LID_LA, la_ltype, la_start + 6, 6);
|
||||||
/* PF_FUNC is 2 bytes at 0th byte of NPC_LT_LA_IH_NIX_ETHER */
|
/* PF_FUNC is 2 bytes at 0th byte of NPC_LT_LA_IH_NIX_ETHER */
|
||||||
NPC_SCAN_HDR(NPC_PF_FUNC, NPC_LID_LA, NPC_LT_LA_IH_NIX_ETHER, 0, 2);
|
NPC_SCAN_HDR(NPC_PF_FUNC, NPC_LID_LA, NPC_LT_LA_IH_NIX_ETHER, 0, 2);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -631,6 +631,12 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
|
|||||||
req->num_regs++;
|
req->num_regs++;
|
||||||
req->reg[1] = NIX_AF_TL3X_SCHEDULE(schq);
|
req->reg[1] = NIX_AF_TL3X_SCHEDULE(schq);
|
||||||
req->regval[1] = dwrr_val;
|
req->regval[1] = dwrr_val;
|
||||||
|
if (lvl == hw->txschq_link_cfg_lvl) {
|
||||||
|
req->num_regs++;
|
||||||
|
req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw->tx_link);
|
||||||
|
/* Enable this queue and backpressure */
|
||||||
|
req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
|
||||||
|
}
|
||||||
} else if (lvl == NIX_TXSCH_LVL_TL2) {
|
} else if (lvl == NIX_TXSCH_LVL_TL2) {
|
||||||
parent = hw->txschq_list[NIX_TXSCH_LVL_TL1][0];
|
parent = hw->txschq_list[NIX_TXSCH_LVL_TL1][0];
|
||||||
req->reg[0] = NIX_AF_TL2X_PARENT(schq);
|
req->reg[0] = NIX_AF_TL2X_PARENT(schq);
|
||||||
@@ -640,11 +646,12 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
|
|||||||
req->reg[1] = NIX_AF_TL2X_SCHEDULE(schq);
|
req->reg[1] = NIX_AF_TL2X_SCHEDULE(schq);
|
||||||
req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val;
|
req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val;
|
||||||
|
|
||||||
req->num_regs++;
|
if (lvl == hw->txschq_link_cfg_lvl) {
|
||||||
req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw->tx_link);
|
req->num_regs++;
|
||||||
/* Enable this queue and backpressure */
|
req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw->tx_link);
|
||||||
req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
|
/* Enable this queue and backpressure */
|
||||||
|
req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
|
||||||
|
}
|
||||||
} else if (lvl == NIX_TXSCH_LVL_TL1) {
|
} else if (lvl == NIX_TXSCH_LVL_TL1) {
|
||||||
/* Default config for TL1.
|
/* Default config for TL1.
|
||||||
* For VF this is always ignored.
|
* For VF this is always ignored.
|
||||||
@@ -1563,6 +1570,8 @@ void mbox_handler_nix_txsch_alloc(struct otx2_nic *pf,
|
|||||||
for (schq = 0; schq < rsp->schq[lvl]; schq++)
|
for (schq = 0; schq < rsp->schq[lvl]; schq++)
|
||||||
pf->hw.txschq_list[lvl][schq] =
|
pf->hw.txschq_list[lvl][schq] =
|
||||||
rsp->schq_list[lvl][schq];
|
rsp->schq_list[lvl][schq];
|
||||||
|
|
||||||
|
pf->hw.txschq_link_cfg_lvl = rsp->link_cfg_lvl;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(mbox_handler_nix_txsch_alloc);
|
EXPORT_SYMBOL(mbox_handler_nix_txsch_alloc);
|
||||||
|
|
||||||
|
|||||||
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Reference in New Issue
Block a user