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riscv: Improve stack randomisation on RV64

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This enlarges the bits availiable for stack randomisation on RV64 from
the default of 8MiB to 1GiB, to match arm64 and x86.

Also, update the documentation to reflect our support for stack
randomisation.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
[Palmer: commit text]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This commit is contained in:
Kefeng Wang
2021-08-12 19:47:02 +08:00
committed by Palmer Dabbelt
parent efe1e08bca
commit d5935537c8
2 changed files with 4 additions and 1 deletions
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2
Documentation/features/vm/ELF-ASLR/arch-support.txt
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@@ -22,7 +22,7 @@
| openrisc: | TODO |
| parisc: | ok |
| powerpc: | ok |
| riscv: | TODO |
| riscv: | ok |
| s390: | ok |
| sh: | TODO |
| sparc: | TODO |