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Merge branch 'pci/reset'

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- Cache PCIe Device Capabilities register (Amey Narkhede)

- Add pcie_reset_flr() with 'probe' argument (Amey Narkhede)

- Add pdev->reset_methods[] array to track reset method ordering (Amey
  Narkhede)

- Remove reset_fn field from pci_dev (Amey Narkhede)

- Add sysfs interface to query and set device reset mechanism (Amey
  Narkhede)

- Add pci_set_acpi_fwnode() to set ACPI_COMPANION (Shanker Donthineni)

- Use acpi_pci_power_manageable() instead of duplicating logic (Shanker
  Donthineni)

- Set ACPI fwnode early and at the same time with OF (Shanker Donthineni)

- Add support for ACPI _RST reset method (Shanker Donthineni)

- Change reset function 'probe' argument to bool (Amey Narkhede)

* pci/reset:
  PCI: Change the type of probe argument in reset functions
  PCI: Add support for ACPI _RST reset method
  PCI: Setup ACPI fwnode early and at the same time with OF
  PCI: Use acpi_pci_power_manageable()
  PCI: Add pci_set_acpi_fwnode() to set ACPI_COMPANION
  PCI: Allow userspace to query and set device reset mechanism
  PCI: Remove reset_fn field from pci_dev
  PCI: Add array to track reset method ordering
  PCI: Add pcie_reset_flr() with 'probe' argument
  PCI: Cache PCIe Device Capabilities register
This commit is contained in:
Bjorn Helgaas
2021-09-02 14:56:42 -05:00
parent 34627f4dcd 9bdc81ce44
commit e210d9fc09
16 changed files with 359 additions and 166 deletions
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13
include/linux/pci.h
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@@ -49,6 +49,12 @@
PCI_STATUS_SIG_TARGET_ABORT | \
PCI_STATUS_PARITY)
/* Number of reset methods used in pci_reset_fn_methods array in pci.c */
#define PCI_NUM_RESET_METHODS 7
#define PCI_RESET_PROBE true
#define PCI_RESET_DO_RESET false
/*
* The PCI interface treats multi-function devices as independent
* devices. The slot/function address of each device is encoded
@@ -333,6 +339,7 @@ struct pci_dev {
struct rcec_ea *rcec_ea; /* RCEC cached endpoint association */
struct pci_dev *rcec; /* Associated RCEC device */
#endif
u32 devcap; /* PCIe Device Capabilities */
u8 pcie_cap; /* PCIe capability offset */
u8 msi_cap; /* MSI capability offset */
u8 msix_cap; /* MSI-X capability offset */
@@ -428,7 +435,6 @@ struct pci_dev {
unsigned int state_saved:1;
unsigned int is_physfn:1;
unsigned int is_virtfn:1;
unsigned int reset_fn:1;
unsigned int is_hotplug_bridge:1;
unsigned int shpc_managed:1; /* SHPC owned by shpchp */
unsigned int is_thunderbolt:1; /* Thunderbolt controller */
@@ -506,6 +512,9 @@ struct pci_dev {
char *driver_override; /* Driver name to force a match */
unsigned long priv_flags; /* Private flags for the PCI driver */
/* These methods index pci_reset_fn_methods[] */
u8 reset_methods[PCI_NUM_RESET_METHODS]; /* In priority order */
};
static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
@@ -1229,7 +1238,7 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
enum pci_bus_speed *speed,
enum pcie_link_width *width);
void pcie_print_link_status(struct pci_dev *dev);
bool pcie_has_flr(struct pci_dev *dev);
int pcie_reset_flr(struct pci_dev *dev, bool probe);
int pcie_flr(struct pci_dev *dev);
int __pci_reset_function_locked(struct pci_dev *dev);
int pci_reset_function(struct pci_dev *dev);