s390/hwcaps: move setup_hwcaps()
Move setup_hwcaps() to processor.c for two reasons: - make setup.c a bit smaller - have allmost all of the hwcap code in one file Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
This commit is contained in:
Heiko Carstens
@@ -11,6 +11,7 @@
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#include <linux/cpufeature.h>
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/random.h>
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#include <linux/sched/mm.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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@@ -23,8 +24,14 @@
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#include <asm/elf.h>
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#include <asm/lowcore.h>
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#include <asm/param.h>
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#include <asm/sclp.h>
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#include <asm/smp.h>
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unsigned long __read_mostly elf_hwcap;
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char elf_platform[ELF_PLATFORM_SIZE];
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unsigned long int_hwcap;
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struct cpu_info {
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unsigned int cpu_mhz_dynamic;
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unsigned int cpu_mhz_static;
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@@ -170,6 +177,159 @@ static void show_cpu_summary(struct seq_file *m, void *v)
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}
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}
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/*
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* Setup hardware capabilities.
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*/
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static int __init setup_hwcaps(void)
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{
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static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
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struct cpuid cpu_id;
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int i;
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/*
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* The store facility list bits numbers as found in the principles
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* of operation are numbered with bit 1UL<<31 as number 0 to
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* bit 1UL<<0 as number 31.
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* Bit 0: instructions named N3, "backported" to esa-mode
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* Bit 2: z/Architecture mode is active
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* Bit 7: the store-facility-list-extended facility is installed
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* Bit 17: the message-security assist is installed
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* Bit 19: the long-displacement facility is installed
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* Bit 21: the extended-immediate facility is installed
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* Bit 22: extended-translation facility 3 is installed
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* Bit 30: extended-translation facility 3 enhancement facility
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* These get translated to:
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* HWCAP_ESAN3 bit 0, HWCAP_ZARCH bit 1,
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* HWCAP_STFLE bit 2, HWCAP_MSA bit 3,
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* HWCAP_LDISP bit 4, HWCAP_EIMM bit 5 and
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* HWCAP_ETF3EH bit 8 (22 && 30).
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*/
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for (i = 0; i < 6; i++)
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if (test_facility(stfl_bits[i]))
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elf_hwcap |= 1UL << i;
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if (test_facility(22) && test_facility(30))
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elf_hwcap |= HWCAP_ETF3EH;
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/*
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* Check for additional facilities with store-facility-list-extended.
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* stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0
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* and 1ULL<<0 as bit 63. Bits 0-31 contain the same information
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* as stored by stfl, bits 32-xxx contain additional facilities.
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* How many facility words are stored depends on the number of
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* doublewords passed to the instruction. The additional facilities
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* are:
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* Bit 42: decimal floating point facility is installed
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* Bit 44: perform floating point operation facility is installed
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* translated to:
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* HWCAP_DFP bit 6 (42 && 44).
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*/
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if ((elf_hwcap & (1UL << 2)) && test_facility(42) && test_facility(44))
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elf_hwcap |= HWCAP_DFP;
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/*
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* Huge page support HWCAP_HPAGE is bit 7.
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*/
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if (MACHINE_HAS_EDAT1)
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elf_hwcap |= HWCAP_HPAGE;
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/*
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* 64-bit register support for 31-bit processes
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* HWCAP_HIGH_GPRS is bit 9.
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*/
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elf_hwcap |= HWCAP_HIGH_GPRS;
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/*
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* Transactional execution support HWCAP_TE is bit 10.
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*/
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if (MACHINE_HAS_TE)
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elf_hwcap |= HWCAP_TE;
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/*
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* Vector extension HWCAP_VXRS is bit 11. The Vector extension
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* can be disabled with the "novx" parameter. Use MACHINE_HAS_VX
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* instead of facility bit 129.
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*/
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if (MACHINE_HAS_VX) {
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elf_hwcap |= HWCAP_VXRS;
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if (test_facility(134))
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elf_hwcap |= HWCAP_VXRS_BCD;
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if (test_facility(135))
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elf_hwcap |= HWCAP_VXRS_EXT;
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if (test_facility(148))
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elf_hwcap |= HWCAP_VXRS_EXT2;
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if (test_facility(152))
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elf_hwcap |= HWCAP_VXRS_PDE;
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if (test_facility(192))
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elf_hwcap |= HWCAP_VXRS_PDE2;
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}
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if (test_facility(150))
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elf_hwcap |= HWCAP_SORT;
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if (test_facility(151))
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elf_hwcap |= HWCAP_DFLT;
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if (test_facility(165))
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elf_hwcap |= HWCAP_NNPA;
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/*
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* Guarded storage support HWCAP_GS is bit 12.
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*/
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if (MACHINE_HAS_GS)
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elf_hwcap |= HWCAP_GS;
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if (MACHINE_HAS_PCI_MIO)
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elf_hwcap |= HWCAP_PCI_MIO;
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get_cpu_id(&cpu_id);
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add_device_randomness(&cpu_id, sizeof(cpu_id));
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switch (cpu_id.machine) {
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case 0x2064:
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case 0x2066:
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default: /* Use "z900" as default for 64 bit kernels. */
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strcpy(elf_platform, "z900");
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break;
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case 0x2084:
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case 0x2086:
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strcpy(elf_platform, "z990");
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break;
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case 0x2094:
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case 0x2096:
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strcpy(elf_platform, "z9-109");
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break;
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case 0x2097:
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case 0x2098:
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strcpy(elf_platform, "z10");
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break;
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case 0x2817:
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case 0x2818:
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strcpy(elf_platform, "z196");
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break;
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case 0x2827:
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case 0x2828:
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strcpy(elf_platform, "zEC12");
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break;
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case 0x2964:
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case 0x2965:
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strcpy(elf_platform, "z13");
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break;
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case 0x3906:
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case 0x3907:
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strcpy(elf_platform, "z14");
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break;
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case 0x8561:
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case 0x8562:
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strcpy(elf_platform, "z15");
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break;
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}
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/*
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* Virtualization support HWCAP_INT_SIE is bit 0.
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*/
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if (sclp.has_sief2)
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int_hwcap |= HWCAP_INT_SIE;
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return 0;
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}
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arch_initcall(setup_hwcaps);
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static void show_cpu_topology(struct seq_file *m, unsigned long n)
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{
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#ifdef CONFIG_SCHED_TOPOLOGY
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@@ -89,11 +89,6 @@ EXPORT_SYMBOL(console_devno);
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unsigned int console_irq = -1;
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EXPORT_SYMBOL(console_irq);
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unsigned long elf_hwcap __read_mostly = 0;
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char elf_platform[ELF_PLATFORM_SIZE];
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unsigned long int_hwcap = 0;
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/*
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* Some code and data needs to stay below 2 GB, even when the kernel would be
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* relocated above 2 GB, because it has to use 31 bit addresses.
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@@ -866,159 +861,6 @@ static void __init setup_cr(void)
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__ctl_load(cr15.val, 15, 15);
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}
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/*
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* Setup hardware capabilities.
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*/
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static int __init setup_hwcaps(void)
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{
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static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
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struct cpuid cpu_id;
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int i;
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/*
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* The store facility list bits numbers as found in the principles
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* of operation are numbered with bit 1UL<<31 as number 0 to
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* bit 1UL<<0 as number 31.
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* Bit 0: instructions named N3, "backported" to esa-mode
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* Bit 2: z/Architecture mode is active
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* Bit 7: the store-facility-list-extended facility is installed
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* Bit 17: the message-security assist is installed
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* Bit 19: the long-displacement facility is installed
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* Bit 21: the extended-immediate facility is installed
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* Bit 22: extended-translation facility 3 is installed
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* Bit 30: extended-translation facility 3 enhancement facility
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* These get translated to:
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* HWCAP_ESAN3 bit 0, HWCAP_ZARCH bit 1,
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* HWCAP_STFLE bit 2, HWCAP_MSA bit 3,
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* HWCAP_LDISP bit 4, HWCAP_EIMM bit 5 and
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* HWCAP_ETF3EH bit 8 (22 && 30).
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*/
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for (i = 0; i < 6; i++)
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if (test_facility(stfl_bits[i]))
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elf_hwcap |= 1UL << i;
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if (test_facility(22) && test_facility(30))
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elf_hwcap |= HWCAP_ETF3EH;
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/*
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* Check for additional facilities with store-facility-list-extended.
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* stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0
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* and 1ULL<<0 as bit 63. Bits 0-31 contain the same information
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* as stored by stfl, bits 32-xxx contain additional facilities.
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* How many facility words are stored depends on the number of
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* doublewords passed to the instruction. The additional facilities
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* are:
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* Bit 42: decimal floating point facility is installed
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* Bit 44: perform floating point operation facility is installed
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* translated to:
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* HWCAP_DFP bit 6 (42 && 44).
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*/
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if ((elf_hwcap & (1UL << 2)) && test_facility(42) && test_facility(44))
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elf_hwcap |= HWCAP_DFP;
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/*
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* Huge page support HWCAP_HPAGE is bit 7.
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*/
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if (MACHINE_HAS_EDAT1)
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elf_hwcap |= HWCAP_HPAGE;
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/*
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* 64-bit register support for 31-bit processes
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* HWCAP_HIGH_GPRS is bit 9.
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*/
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elf_hwcap |= HWCAP_HIGH_GPRS;
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/*
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* Transactional execution support HWCAP_TE is bit 10.
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*/
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if (MACHINE_HAS_TE)
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elf_hwcap |= HWCAP_TE;
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/*
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* Vector extension HWCAP_VXRS is bit 11. The Vector extension
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* can be disabled with the "novx" parameter. Use MACHINE_HAS_VX
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* instead of facility bit 129.
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*/
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if (MACHINE_HAS_VX) {
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elf_hwcap |= HWCAP_VXRS;
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if (test_facility(134))
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elf_hwcap |= HWCAP_VXRS_BCD;
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if (test_facility(135))
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elf_hwcap |= HWCAP_VXRS_EXT;
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if (test_facility(148))
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elf_hwcap |= HWCAP_VXRS_EXT2;
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if (test_facility(152))
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elf_hwcap |= HWCAP_VXRS_PDE;
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if (test_facility(192))
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elf_hwcap |= HWCAP_VXRS_PDE2;
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}
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if (test_facility(150))
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elf_hwcap |= HWCAP_SORT;
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if (test_facility(151))
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elf_hwcap |= HWCAP_DFLT;
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if (test_facility(165))
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elf_hwcap |= HWCAP_NNPA;
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/*
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* Guarded storage support HWCAP_GS is bit 12.
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*/
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if (MACHINE_HAS_GS)
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elf_hwcap |= HWCAP_GS;
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if (MACHINE_HAS_PCI_MIO)
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elf_hwcap |= HWCAP_PCI_MIO;
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get_cpu_id(&cpu_id);
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add_device_randomness(&cpu_id, sizeof(cpu_id));
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switch (cpu_id.machine) {
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case 0x2064:
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case 0x2066:
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default: /* Use "z900" as default for 64 bit kernels. */
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strcpy(elf_platform, "z900");
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break;
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case 0x2084:
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case 0x2086:
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strcpy(elf_platform, "z990");
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break;
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case 0x2094:
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case 0x2096:
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strcpy(elf_platform, "z9-109");
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break;
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case 0x2097:
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case 0x2098:
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strcpy(elf_platform, "z10");
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break;
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case 0x2817:
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case 0x2818:
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strcpy(elf_platform, "z196");
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break;
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case 0x2827:
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case 0x2828:
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strcpy(elf_platform, "zEC12");
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break;
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case 0x2964:
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case 0x2965:
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strcpy(elf_platform, "z13");
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break;
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case 0x3906:
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case 0x3907:
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strcpy(elf_platform, "z14");
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break;
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case 0x8561:
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case 0x8562:
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strcpy(elf_platform, "z15");
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break;
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}
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/*
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* Virtualization support HWCAP_INT_SIE is bit 0.
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*/
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if (sclp.has_sief2)
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int_hwcap |= HWCAP_INT_SIE;
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return 0;
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}
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arch_initcall(setup_hwcaps);
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/*
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* Add system information as device randomness
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*/
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