moonjuice/kernel_arpi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
982,974 Commits 7 Branches 0 Tags
3816139c8a4fe5e1fb901b51e94b98822a6e4108
Commit Graph

17120 Commits

Author SHA1 Message Date
Evan Quan
4460571bee drm/amd/pm: increase mclk switch threshold to 200 us 
To avoid underflow seen on Polaris10 with some 3440x1440
144Hz displays. As the threshold of 190 us cuts too close
to minVBlankTime of 192 us.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-14 15:14:09 -04:00
Mauro Carvalho Chehab
8d8ac1a1e9 drm/amd/display: kernel-doc: document force_timing_sync 
As warned when running "make htmldocs":

	./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:345: warning: Function parameter or member 'force_timing_sync' not described in 'amdgpu_display_manager'

This new struct member was not documented at kernel-doc markup.

Fixes: 3d4e52d0cf ("drm/amd/display: Add debugfs for forcing stream timing sync")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-14 15:13:59 -04:00
Bernard Zhao
4fbb3ae219 drm/amd/display: remove no need return value 
Functions (disable_all_writeback_pipes_for_stream &
dc_enable_stereo & dc_post_update_surfaces_to_stream)
always return true, there is no need to keep the return value.
This change is to make the code a bit more readable.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-14 15:13:53 -04:00
kernel test robot
206b737240 drm/amdgpu: fix semicolon.cocci warnings 
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:608:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: b4a7db71ea ("drm/amdgpu: add per device user friendly xgmi events for vega20")
CC: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-14 15:13:48 -04:00
Alex Deucher
cde3359acb drm/amdgpu/swsmu: init the baco mutex in early_init 
GPU reset might get called during init time, before
sw_init has been called.

Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-14 15:13:34 -04:00
Roman Li
71c0fd9221 drm/amd/display: Add green_sardine support to DM 
Display Manager support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:03:20 -04:00
Roman Li
9ba93114c4 drm/amd/display: Add green_sardine support to DC 
Display Core support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:03:17 -04:00
Tao Zhou
7cc656e2d0 drm/amdgpu: add DM block for dimgrey_cavefish 
Add DM block support for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:03:10 -04:00
Tao Zhou
78aafee761 drm/amdgpu: remove ASD ucode init for dimgrey_cavefish 
dimgrey_cavefish has no ASD ucode currently, remove its initialization.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:03:01 -04:00
Bhawanpreet Lakha
2a41120504 drm/amd/display: Add DCN302 support in amdgpu_dm (v2) 
Handle CAVE_DIMGREY_CAVEFISH in amdgpu_dm

v2: fix rebase typo (Alex)

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:56 -04:00
Bhawanpreet Lakha
36d26912e8 drm/amd/display: Add support for DCN302 (v2) 
- add DCN302 resource, irq service, dmub loader,
 - handle  DC_VERSION_DCN_3_02
 - define DCN302 power gating functions
 - handle DCN302 in GPIO files
 - define I2C regs
 - add CONFIG_DRM_AMD_DC_DCN3_02 guard

v2: rebase fixes (Alex)

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:51 -04:00
Tao Zhou
4da6783908 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish 
Per PMFW 59.7.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:48 -04:00
Tao Zhou
eac88a5fc6 drm/amdgpu: remove gpu_info fw support for dimgrey_cavefish 
Remove gpu_info fw support for dimgrey_cavefish, gpu info can be got
from ip discovery.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:46 -04:00
Tao Zhou
8e3bfb992c drm/amdgpu: enable ih CG for dimgrey_cavefish 
Set ih CG flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:43 -04:00
Tao Zhou
2c70c332a1 drm/amdgpu: enable hdp CG and LS for dimgrey_cavefish 
Set hdp CG and LS flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:40 -04:00
Tao Zhou
aff39cdecd drm/amdgpu: add psp and smu block for dimgrey_cavefish 
Add psp and smu block for dimgrey_cavefish with psp firmware load type.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by:Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:37 -04:00
Tao Zhou
7dc2ef4e70 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish(v2) 
Per PMFW 59.5.0.

v2: refine subject and commit message, fix typo

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:31 -04:00
Tao Zhou
4ccc957f15 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish 
Update driver if version from 0x5 to 0x6 for dimgrey_cavefish, per PMFW 59.04.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:29 -04:00
James Zhu
be6b1cd3b7 drm/amdgpu: enable jpeg3.0 for dimgrey_cavefish 
Enable jpeg3.0 ip block for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:26 -04:00
James Zhu
0afc770ba8 drm/amdgpu: enable vcn3.0 for dimgrey_cavefish 
Enable vcn3.0 ip block for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:12 -04:00
Tao Zhou
e8afbddfa1 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish 
Update driver if version from 0x4 to 0x5 for dimgrey_cavefish, per PMFW 59.02.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:09 -04:00
Tao Zhou
73da8e8628 drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefish 
Set athub/mmhub PG flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:05 -04:00
Tao Zhou
135333a0ce drm/amdgpu: enable mc CG and LS for dimgrey_cavefish 
Set mc CG and LS flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:02:00 -04:00
Tao Zhou
583e5a5e90 drm/amdgpu: enable GFX clock gating for dimgrey_cavefish 
Enable GFX MGCG, CGCG and 3DCG for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:55 -04:00
Tao Zhou
4ed032bd13 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish 
Update driver if version according to PMFW with version 0x003B0100.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:51 -04:00
Tao Zhou
e4ed4f50d2 drm/amdgpu: support athub cg setting for dimgrey_cavefish 
Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:48 -04:00
Tao Zhou
f897ea3550 drm/amdgpu: enable front door loading for dimgrey_cavefish 
Support both back and front door loading for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:46 -04:00
James Zhu
cc6161aa70 drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefish 
Enable JPEG3.0 PG and CG for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:43 -04:00
James Zhu
d5bc1579b0 drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefish 
Enable VCN3.0 PG and CG for dimgrey_cavefish

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:41 -04:00
Chengming Gui
8f72ce6421 drm/amdkfd: Add kfd2kgd_funcs for dimgrey_cavefish kfd support 
Add KFD support.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:25 -04:00
Chengming Gui
eb5a34d482 drm/amdkfd: Support dimgrey_cavefish KFD (v2) 
Add KFD support for dimgrey cavefish.

v2: rebase (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:21 -04:00
Tao Zhou
a1fe2ba728 drm/amdgpu: add gc golden setting for dimgrey_cavefish 
Add gc golden setting for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Tested-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:19 -04:00
Tao Zhou
d9fa6a0b10 drm/amdgpu: support cp_fw_write_wait for dimgrey_cavefish 
Same as sienna_cichlid, dimgrey_cavefish supports WAIT_REG_MEM packet.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:16 -04:00
Tao Zhou
aeec074448 drm/amdgpu: skip reroute ih for some ASICs 
Add check before reroute ih setting, it's not supported by some ASICs.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:14 -04:00
Tao Zhou
462c272b90 drm/amdgpu: add psp support for dimgrey_cavefish(v2) 
General psp support for dimgrey_cavefish.

v2: remove the checks for asd load and reroute ih.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:12 -04:00
Tao Zhou
0a305e34c7 drm/amdgpu: increase size of psp fw_name string(v2) 
Increase fw_name string size so longer chip name can be stored.

v2: define macro for the length of psp fw name.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:09 -04:00
Tao Zhou
db1f8a8fb2 drm/amdgpu/swsmu: add smu support for dimgrey_cavefish(v2) 
Reuse sienna_cichlid pp table for dimgrey_cavefish.

v2: update related comment.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:07 -04:00
Tao Zhou
10e0d9ebb0 drm/amdgpu/swsmu: increase size for smu fw_name string 
A longer chip name needs more space.

v2: define macro for the length of smu fw name

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:01:02 -04:00
Tao Zhou
f267242e15 drm/amdgpu: add gmc cg support for dimgrey_cavefish 
The athub version for dimgrey_cavefish is v2.1.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:57 -04:00
James Zhu
467db422cb drm/amdgpu/vcn: enable VCN DPG mode for dimgrey_cavefish 
Enable VCN DPG mode for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:54 -04:00
James Zhu
0c2c02b66c drm/amdgpu/vcn: add firmware support for dimgrey_cavefish 
Add firmware support for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:52 -04:00
Tao Zhou
6c72c7a03a drm/amdgpu: force pa_sc_tile_steering_override to 0 for dimgrey_cavefish 
pa_sc_tile_steering_override is only programmable for gfx10.0/10.1/10.2, the same as sienna_cichlid.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:47 -04:00
Tao Zhou
76a2d9ea69 drm/amdgpu: add virtual display support for dimgrey_cavefish 
Add virtual ip block for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:45 -04:00
Tao Zhou
2eb6145653 drm/amdgpu: configure dimgrey_cavefish gfx according to gfx 10.3's definition 
The gfx version of dimgrey_cavefish is 10.3, identical to sienna_cichlid, follow the way
of sienna_cichlid.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:42 -04:00
Tao Zhou
0106922600 drm/amdgpu: add sdma ip block for dimgrey_cavefish 
Enable sdma block for dimgrey_cavefish, same as sienna_cichlid.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:37 -04:00
Tao Zhou
feb6329c58 drm/amdgpu: add gfx ip block for dimgrey_cavefish 
Enable gfx block for dimgrey_cavefish, same as navy_flounder.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:35 -04:00
Tao Zhou
771cc67ed0 drm/amdgpu: add ih ip block for dimgrey_cavefish 
Enable ih block for dimgrey_cavefish, same as navy_flounder.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:31 -04:00
Tao Zhou
3e02ad4476 drm/amdgpu: add gmc ip block for dimgrey_cavefish 
Enable gmc block for dimgrey_cavefish, same as sienna_cichlid.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:29 -04:00
Tao Zhou
2aa92b12df drm/amdgpu: add common ip block for dimgrey_cavefish 
Same as navy_flounder.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:25 -04:00
Tao Zhou
01cbb6b288 drm/amdgpu: add mmhub support for dimgrey_cavefish 
Same as navy_flounder.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-12 14:00:22 -04:00