Jonathan writes:
Third set of IIO new device support, features and cleanups for the 4.6 cycle.
Good to see several new contributors in this set - and more generally a
number of new 'faces' over this whole cycle.
Staging movements
* hmc5843
- out of staging.
* periodic RTC trigger
- driver dropped. This is an ancient driver (brings back some memories ;)
that was always somewhat of a bodge. Originally there was a driver that
never went into mainline that supported large numbers of periodict timers
on the PXA270 via this route. Discussions to have a generic periodic
timer subsystem never went anywhere. At the time RTC periodic
interrupts were real - now they are emulated using high resolution
timers so with the HRT driver this has become pointless.
New device support
* mpu6050 driver
- Add support for the mpu6500.
* TI tpl0102 potentiometer
- new driver.
* Vybrid SoC DAC
- new driver. The ADC on this SoC has been supported for a while, this
adds a separate driver for the DAC.
New Features
* hmc5844
- Attributes to configure the bias current (typically part of a self test)
This could be done before via a somewhat obscure custom interface.
This at least makes it easy to tell what is going on.
- Document all custom attributes.
* mpu6050
- Add support for calibration offset control and readback.
* ms5611
- power regulator support. This is always one that gets added the
first time someone has a board that needs it. Here it was needed,
hence it was added.
Cleanups / minor fixes
* tree wide
- clean up all the myriad different return values in response to a
failure of i2c_check_functionality. After discussions everyone seemed
happy wiht -EOPNOTSUPP which seems to describe the situation well.
I encouraged a tree wide cleanup to set a good example in future for
this.
* core
- Typos in the iio_event_spec documentation in iio.h
* afe4403
- select REGMAP_SPI to avoid dependency issues
- mark suspend/resume as __maybe_unused to avoid warnings
* afe4404
- mark suspend/resume as __maybe_unused to avoid warnings
* atlas-ph-sensor
- switch the regmap cache type from linear to rbtree to gain reading of
registers on initial startup. It's not immediately obvious, but
regmap flat is meant for high performances cases so doesn't read these
registers.
- use regmap_bulk_read in one case where it was using
i2c_smbus_read_i2c_block_data directly (unlike everything else that was
through regmap).
* ina2xx
- stype cleanups (lots of them!)
* isl29018
- Get the struct device back from regmap rather than storing another
copy of it in the private data. This cleanup makes sense in a number
of other drivers so patches may well follow.
* mpu6050
- style cleanups (lots of them!)
- improved return value handling
- use usleep_range to avoid the usual issues with very short msleeps.
- add some missing documentation.
* ms5611
- use the probed device name for the device rather than the driver name.
- select IIO_BUFFER to avoid dependency issues
* palmas
- drop IRQF_EARLY_RESUME as no longer needed after genirq changes.
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.
Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.
Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
This patch adds a exynos5420 driver data to support mic_bypass
option to bypass the mic from display out path.
The mic(Mobile image compressor) compresses RGB data from fimd
and send the compressed data to the mipi dsi.
The bypass option can be founded from system register and the bit
is 11. The option bit has been introduced since exynos5420. The
only difference between exynos5250 and exynos5420/exynos5422 is
existence of the bit. Until the MIC is defined and enabled from
device tree, the bypass mic will be default option.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This patch supports mipi dsi for exynos5422. The dsi register
offsets of the exynos5422 are similar with exynos5433. However,
the values of the registers are quite different from the
exynos5433. For example, the exynos5422 uses sw reset like
previous chips.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Since the related driver (CPG/MSSR driver) only manages the first module
clock, this driver should not handle the HSUSB registers. So, this patch
removes the HSUSB registers handling.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add dt binding documentation for rockchip display port PHY.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This patch adds a binding that describes the Rockchip eMMC PHYs
found on Rockchip SoCs eMMC interface.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The settings in GPR8 are dependent upon the particular layout of the
hardware platform. As such, they should be configurable via the device
tree.
Look up PHY Tx driver settings from the device tree. Fall back to the
original hard-coded values if they are not specified in the device tree.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Merge "pxa changes for v4.6 cycle" from Robert Jarzmik:
This is a minor cycle with :
- cleanup fixes from Arnd, mainly build oriented and sparse type ones
- dma fixes for requestors above 32 (impacting mainly camera driver)
- some minor cleanup on pxa3xx device-tree side
* tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux:
dmaengine: pxa_dma: fix the maximum requestor line
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: pxa: pxa3xx device-tree support cleanup
ARM: pxa: don't select RFKILL if CONFIG_NET is disabled
ARM: pxa: fix building without IWMMXT
ARM: pxa: move extern declarations to pm.h
ARM: pxa: always select one of the two CPU types
ARM: pxa: don't select GPIO_SYSFS for MIOA701
ARM: pxa: mark unused eseries code as __maybe_unused
ARM: pxa: mark spitz_card_pwr_ctrl as __maybe_unused
ARM: pxa: define clock registers as __iomem
Add ARM CoreLink CCI-550 cache coherent interconnect PMU
driver support. The CCI-550 PMU shares all the attributes of CCI-500
PMU, except for an additional master interface (MI-6 - 0xe).
CCI-550 requires the same work around as for CCI-500 to
write to the PMU counter.
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Registers are 64bit apart, so we refactor bus_shift handling a little and set
it based on the DT compatible. Also, EXT_ACC is different. It has been tested
on a Salvator-X (Gen3) and, to check for regressions, on a Lager (Gen2).
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
If this property is not set, the max packet size is 1023 bytes, and if
the total of packet size for pervious transactions are more than 256 bytes,
it can't accept any transactions within this frame. The use case is single
transaction, but higher frame rate.
If this property is set, the max packet size is 188 bytes, it can handle
more transactions than above case, it can accept transactions until it
considers the left room size within frame is less than 188 bytes, software
needs to make sure it does not send more than 90%
maximum_periodic_data_per_frame. The use case is multiple transactions, but
less frame rate.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This patch adds the missing compatible strings from ci_hdrc_imx.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Pull ARM SoC fixes from Olof Johansson:
"We didn't have a batch last week, so this one is slightly larger.
None of them are scary though, a handful of fixes for small DT pieces,
replacing properties with newer conventions.
Highlights:
- N900 fix for setting system revision
- onenand init fix to avoid filesystem corruption
- Clock fix for audio on Beaglebone-x15
- Fixes on shmobile to deal with CONFIG_DEBUG_RODATA (default y in 4.6)
+ misc smaller stuff"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
MAINTAINERS: Extend info, add wiki and ml for meson arch
MAINTAINERS: alpine: add a new maintainer and update the entry
ARM: at91/dt: fix typo in sama5d2 pinmux descriptions
ARM: OMAP2+: Fix onenand initialization to avoid filesystem corruption
Revert "regulator: tps65217: remove tps65217.dtsi file"
ARM: shmobile: Remove shmobile_boot_arg
ARM: shmobile: Move shmobile_smp_{mpidr, fn, arg}[] from .text to .bss
ARM: shmobile: r8a7779: Remove remainings of removed SCU boot setup code
ARM: shmobile: Move shmobile_scu_base from .text to .bss
ARM: OMAP2+: Fix omap_device for module reload on PM runtime forbid
ARM: OMAP2+: Improve omap_device error for driver writers
ARM: DTS: am57xx-beagle-x15: Select SYS_CLK2 for audio clocks
ARM: dts: am335x/am57xx: replace gpio-key,wakeup with wakeup-source property
ARM: OMAP2+: Set system_rev from ATAGS for n900
ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
ARM: dts: kirkwood: use unique machine name for ds112
ARM: dts: imx6: remove bogus interrupt-parent from CAAM node
Merge "Broadcom devicetree-arm64 changes for 4.6" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoCs device tree changes:
- Anup adds additional nodes to the Broadcom Northstart 2 Device Trees: SDHCI
(iProc-compatible), ARM SP804 timers, ARM SP805 watchdog
- Anup also adds a binding documentation for the ARM SP805 watchdog since there
was not one in tree before
- Ray adds PCIE root complex nodes to the Northstar 2 Device Tree nodes, using
the iProc-compatible binding
- Jayachandran C. adds binding documentation for the Broadcom Vulcan processors and
reference platforms
* tag 'arm-soc/for-4.6/devicetree-arm64' of http://github.com/Broadcom/stblinux:
dt-bindings: Add documentation for Broadcom Vulcan
arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2
arm64: dts: Add ARM SP805 watchdog DT node for NS2
dt-bindings: watchdog: Add ARM SP805 DT bindings
arm64: dts: Add ARM SP804 timer DT nodes for NS2
arm64: dts: Add SDHCI DT node for NS2
For pxa based platforms, the number of requestor lines should be
specified, so that the driver can check if the flow control should be
activated (when a requestor line is asked for) or not.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Rob Herring <robh@kernel.org>
Merge "ARM: Keystone DTS for 4.6" from Santosh Shilimkar:
ARM: DTS: Add new bindings for K2G and the K2G evm
K2G SoC family is the newest version of the Keystone family of processors.
The technical reference manual for K2G can be found here:
http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf
* tag 'keystone_dts_for_4.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: Add minimum support for K2G evm
ARM: dts: keystone: Add Initial DT support for TI K2G SoC family
ARM: keystone: Create new binding for K2G SoC
Device tree changes for omaps for v4.6 merge window. Mostly just
adding board specific devices and few new boards:
- N900 improvments for adp1653 and gpio keys
- Add missing bandgap data for omap3
- Add more devices for compulab cm-t335
- Add n950 WLAN support, enable modem, add pinctrl for SSI
- Correct dm814x and dra62x auxclk rate, add support for GPMC and NAND
- Add syscon node for PHY's on dra7
- Add support more devices on logicpd torpedo
- Add USB host support for igep and specify boot console
- Fix audio clock for am335x-sl50 and specify boot console
- Remove deprecated tx-fifo-resize for dwc3 that was only used on
omap5 es1.0
- Add dra7 thermal data
- Update am43x-epos-evm compatible string to am438
- Add support for logicpd dm3730 som-lv
* tag 'omap-for-v4.6/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (38 commits)
ARM: dts: am57xx-beagle-x15: Add eeprom information
ARM: dts: Add HSUSB2 EHCI Support to Logic PD DM37xx SOM-LV
ARM: dts: n900: Use linux input defines instead hardcoded constants
ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV
ARM: dts: omap3logic: Add PWM-Backlight
ARM: dts: omap3-n900: Allow gpio keys to be disabled
ARM: dts: am43x-epos-evm: Add the am438 compatible string
ARM: dts: DRA7: Add missing IVA and DSPEVE thermal domain data
ARM: dts: DRA7: Add IVA thermal data
ARM: dts: DRA7: Add DSPEVE thermal data
ARM: dts: remove deprecated property dwc3
ARM: dts: OMAP3-N950-N9: Add ssi idle pinctrl state
ARM: dts: am335x-sl50: Fix audio codec setup.
ARM: dts: am335x-sl50: Specify the device to be used for boot console output.
ARM: dts: omap3-igep0030-common: Add USB Host support
ARM: dts: igep00x0: Specify the device to be used for boot console output.
ARM: dts: LogicPD Torpedo: Set HSUSB0 Pin Mux
ARM: dts: OMAP3-N950-N9: Enable modem
ARM: dts: OMAP3-N950-N9: Enable SSI module
ARM: dts: LogicPD Torpedo: Add SPI EEPROM
...
Merge "ARM: mediatek: dts updates for v4.6" from Matthias Brugger:
Add support for mt7623 SoC.
Enable SMP support for mt7623.
Enable SMP support for mt2701
Add pinctrl for mt2701
* tag 'v4.5-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: Add pinctrl/GPIO/EINT node for mt2701
ARM: dts: mt2701: enable basic SMP bringup for mt2701
ARM: dts: mt7623: enable SMP bringup
ARM: dts: mediatek: add MT7623 basic support
Document: DT: Add bindings for mediatek MT7623 SoC Platform
This commit adds the base Device Tree files for the Armada 7K and 8K
SoCs, as well as the Armada 8040 DB board.
The Armada 7020, 7040 (7K family) and 8020, 8040 (8K family) are
composed of:
- An AP806 block that contains the CPU core and a few basic
peripherals. The AP806 is available in dual core configurations
(used in 7020 and 8020) and quad core configurations (used in 8020
and 8040).
- One or two CP110 blocks that contain all the high-speed interfaces
(SATA, PCIe, Ethernet, etc.). The 7K family chips have one CP110,
and the 8K family chips have two CP110, giving them twice the
number of HW interfaces.
In order to represent this from a Device Tree point of view, this
commit creates the following hierarchy:
* armada-ap806.dtsi - definitions common to dual/quad ap806
* armada-ap806-dual.dtsi - description of the two CPUs
* armada-7020.dtsi - description of the 7020 SoC
* armada-8020.dtsi - description of the 8020 SoC
* armada-ap806-quad.dtsi - description of the four CPUs
* armada-7040.dtsi - description of the 7040 SoC
* armada-7040-db.dts - description of the 7040 board
* armada-8040.dtsi - description of the 8040 SoC
The CP110 blocks are not described yet, and will be part of future
patch series.
[gregory.clement@free-electrons.com: Fix commit title by adding ' dts:']
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Simply document new compatibility string.
As a previous patch adds a generic R-Car Gen2 compatibility string
there appears to be no need for a driver updates.
By documenting these compat stings they may be used in DTSs shipped, for
example as part of ROMs. They must be used in conjunction with the Gen2
fallback compat string. At this time there are no known differences between
the r8a779[234] IP blocks and that implemented by the driver for the Gen2
fallback compat string. Thus there is no need to update the driver as the
use of the Gen2 fallback compat string will activate the correct code in
the current driver while leaving the option for r8a779[234]-specific driver
code to be activated in an updated driver should the need arise.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add fallback compatibility string for R-Car Gen 1 and Gen2.
In the case of Renesas R-Car hardware we know that there are generations of
SoCs, e.g. Gen 1 and Gen 2. But beyond that its not clear what the
relationship between IP blocks might be. For example, I believe that
r8a7779 is older than r8a7778 but that doesn't imply that the latter is a
descendant of the former or vice versa.
We can, however, by examining the documentation and behaviour of the
hardware at run-time observe that the current driver implementation appears
to be compatible with the IP blocks on SoCs within a given generation.
For the above reasons and convenience when enabling new SoCs a
per-generation fallback compatibility string scheme being adopted for
drivers for Renesas SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The cs4271 has three power domains: vd, vl and va.
Enable them all, as long as the codec is in use.
While at it, factored out the reset code into its own function.
Signed-off-by: Pascal Huerst <pascal.huerst@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds support for the global clock controller found on
the IPQ4019 based devices. This includes UART, I2C, SPI etc.
Signed-off-by: Pradeep Banavathi <pradeepb@codeaurora.org>
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
[sboyd@codeaurora.org: Drop 0x16024 enable_reg in crypto_ahb]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).
Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
the commit log a bit]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
K2G SoC family is the newest version of the Keystone family of processors.
The technical reference manual for K2G can be found here:
http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf
Add new bindings for K2G and the K2G evm. Also document these new bindings.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This patch adds support for v5 of SYSMMU controller, found in Samsung
Exynos 5433 SoCs. The main difference of v5 is support for 36-bit physical
address space and some changes in register layout and core clocks hanging.
This patch also adds support for ARM64 architecture, which is used by
Exynos 5433 SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Exynos SYSMMU bindings documentation was merged before generic IOMMU
binding have been introduced. This patch updates documentation to match
current state.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
allwinner,sun8i-h3-r-pinctrl was added by
commit ba83a11104 ("pinctrl: sunxi: Add H3 R_PIO controller support")
but the patch was missing proper binding documentation. This patch fixes
this issue.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reset controller changes for v4.6
- add support for the imgtec Pistachio SoC reset controller
- make struct reset_control_ops const
- move DT cell size check into the core to avoid code duplication
in the drivers
* tag 'reset-for-4.6' of git://git.pengutronix.de/git/pza/linux:
reset: sti: Make reset_control_ops const
reset: zynq: Make reset_control_ops const
reset: socfpga: Make reset_control_ops const
reset: hi6220: Make reset_control_ops const
reset: ath79: Make reset_control_ops const
reset: lpc18xx: Make reset_control_ops const
reset: sunxi: Make reset_control_ops const
reset: img: Make reset_control_ops const
reset: berlin: Make reset_control_ops const
reset: berlin: drop DT cell size check
reset: img: Add Pistachio reset controller driver
reset: img: Add pistachio reset controller binding document
reset: hisilicon: check return value of reset_controller_register()
reset: Move DT cell size check to the core
reset: Make reset_control_ops const
reset: remove unnecessary local variable initialization from of_reset_control_get_by_index
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt64 for 4.6 (part 1)
Device tree part of the Armada 3700 support:
- binding for the Armada 3700 SoCs
- device tree files for the SoCs and a board
- tidy up the Marvell related files
* tag 'mvebu-dt64-4.6-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: add the Marvell Armada 3700 family and a development board
devicetree: bindings: add DT binding for the Marvell Armada 3700 SoC family
Documentation: dt: Tidy up the Marvell related files
Documentation: dt-bindings: Add a new compatible for the Armada 3700
Signed-off-by: Olof Johansson <olof@lixom.net>
The patch adds LS2085a to PCIe compatible to fix the compatibility
issue when using firmware with LS2085a compatible property.
Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds device tree bindings for the Artpec-6 SoC.
Signed-off-by: Lars Persson <larper@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.
* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
ARM: dts: rockchip: support the spi for rk3036
ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
ARM: dts: rockchip: add the leds control for rk3036-kylin board
ARM: dts: rockchip: add tsadc node
clk: rockchip: Add new id for rk3066 tsadc clock
ARM: dts: rockchip: add clock-cells for usb phy nodes
ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
ARM: dts: rockchip: add rk3288 mipi_dsi nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for the power-domains on rk3368 and a fix for
a wrong handling of for_each_available_child_of_node.
* tag 'v4.6-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: fix err handle while probing
soc: rockchip: power-domain: Modify power domain driver for rk3368
dt-bindings: modify document of Rockchip power domains
dt-bindings: add power-domain header for RK3368 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
Few updates for ARM VExpress/Juno platforms
1. GICv3 support on Foundation models
2. Support for Juno R2 board
3. Support for ARM HDLCD on all Juno platforms
* tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: Add HDLCD support on Juno platforms
Documentation: drm: Add DT bindings for ARM HDLCD
arm64: dts: Add support for Juno r2 board
arm64: dts: move juno pcie-controller to base file
arm64: dts: add .dts for GICv3 Foundation model
arm64: dts: split Foundation model dts to put the GIC separately
arm64: dts: Foundation model: increase GICC region to allow EOImode=1
arm64: dts: prepare foundation-v8.dts to cope with GICv3
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge DT changes for lpc32xx from Vladimir Zapolskiy:
"The changes add description of clock providers and clock consumers,
define default irq types of SoC controllers and add PHY3250 board
regulators.
I'm adding an official LPC32xx maintainer Roland to Cc, however he seems
to be unresponsive for a quite long time (since 2014)."
* 'lpc32xx/dt' of https://github.com/vzapolskiy/linux:
arm: dts: phy3250: add SD fixed regulator
arm: dts: phy3250: add lcd and backlight fixed regulators
arm: dts: lpc32xx: assign interrupt types
arm: dts: lpc32xx: remove clock frequency property from UART device nodes
arm: dts: lpc32xx: add USB clock controller
arm: dts: lpc32xx: add clock properties to device nodes
arm: dts: lpc32xx: add clock controller device node
arm: dts: lpc32xx: add device nodes for external oscillators
dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it
Signed-off-by: Olof Johansson <olof@lixom.net>
