Diogo Ivo ebc56b0f73 clk: tegra: Add missing reset deassertion ...

commit 23a43cc437e747473d5f8f98b4fe189fb5c433b7 upstream.

Commit 4782c0a5dd ("clk: tegra: Don't deassert reset on enabling
clocks") removed deassertion of reset lines when enabling peripheral
clocks. This breaks the initialization of the DFLL driver which relied
on this behaviour.

Fix this problem by adding explicit deassert/assert requests to the
driver. Tested on Google Pixel C.

Cc: stable@vger.kernel.org
Fixes: 4782c0a5dd ("clk: tegra: Don't deassert reset on enabling clocks")
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2022-06-09 10:23:29 +02:00

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clk-audio-sync.c

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clk-bpmp.c

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clk-dfll.c

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clk-dfll.h

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clk-divider.c

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clk-id.h

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clk-periph-fixed.c

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clk-periph-gate.c

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clk-periph.c

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clk-pll-out.c

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clk-pll.c

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clk-sdmmc-mux.c

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clk-super.c

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clk-tegra20-emc.c

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clk-tegra20.c

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clk-tegra30.c

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clk-tegra114.c

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clk-tegra124-dfll-fcpu.c

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clk-tegra124-emc.c

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clk-tegra124.c

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clk-tegra210-emc.c

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clk-tegra210.c

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clk-tegra-audio.c

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clk-tegra-fixed.c

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clk-tegra-periph.c

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clk-tegra-super-cclk.c

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clk-tegra-super-gen4.c

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clk-utils.c

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clk.c

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clk.h

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cvb.c

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cvb.h

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Kconfig

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Makefile

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