33647d7a46
[ Upstream commit 3b835f1b8acef53c8882b25f40f48d7f5982c938 ]
The Avenger96 is populated with STM32MP157A DHCOR SoM, drop the
stm32mp15xc.dtsi which should only be included in DTs of devices
which are populated with STM32MP15xC/F SoC as the stm32mp15xc.dtsi
enables CRYP block not present in the STM32MP15xA/D SoC .
Fixes: 7e76f82acd ("ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
38 lines
955 B
Plaintext
38 lines
955 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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*
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* DHCOR STM32MP1 variant:
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* DHCR-STM32MP157A-C065-R102-V18-SPI-C-01LG
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* DHCOR PCB number: 586-100 or newer
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* Avenger96 PCB number: 588-200 or newer
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp15xx-dhcor-som.dtsi"
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#include "stm32mp15xx-dhcor-avenger96.dtsi"
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/ {
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model = "Arrow Electronics STM32MP157A Avenger96 board";
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compatible = "arrow,stm32mp157a-avenger96", "dh,stm32mp157a-dhcor-som",
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"st,stm32mp157";
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};
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&m_can1 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can1_pins_b>;
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pinctrl-1 = <&m_can1_sleep_pins_b>;
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status = "disabled";
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};
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&m_can2 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can2_pins_a>;
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pinctrl-1 = <&m_can2_sleep_pins_a>;
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status = "disabled";
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};
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