eb3e943a32
commit b2d473a6019ef9a54b0156ecdb2e0398c9fa6a24 upstream.
In the compressed instruction extension, c.jr, c.jalr, c.mv, and c.add
is encoded the following way (each instruction is 16b):
---+-+-----------+-----------+--
100 0 rs1[4:0]!=0 00000 10 : c.jr
100 1 rs1[4:0]!=0 00000 10 : c.jalr
100 0 rd[4:0]!=0 rs2[4:0]!=0 10 : c.mv
100 1 rd[4:0]!=0 rs2[4:0]!=0 10 : c.add
The following logic is used to decode c.jr and c.jalr:
insn & 0xf007 == 0x8002 => instruction is an c.jr
insn & 0xf007 == 0x9002 => instruction is an c.jalr
When 0xf007 is used to mask the instruction, c.mv can be incorrectly
decoded as c.jr, and c.add as c.jalr.
Correct the decoding by changing the mask from 0xf007 to 0xf07f.
Fixes: c22b0bcb1d ("riscv: Add kprobes supported")
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20230102160748.1307289-1-bjorn@kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef _RISCV_KERNEL_PROBES_SIMULATE_INSN_H
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#define _RISCV_KERNEL_PROBES_SIMULATE_INSN_H
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#define __RISCV_INSN_FUNCS(name, mask, val) \
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static __always_inline bool riscv_insn_is_##name(probe_opcode_t code) \
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{ \
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BUILD_BUG_ON(~(mask) & (val)); \
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return (code & (mask)) == (val); \
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} \
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bool simulate_##name(u32 opcode, unsigned long addr, \
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struct pt_regs *regs)
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#define RISCV_INSN_REJECTED(name, code) \
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do { \
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if (riscv_insn_is_##name(code)) { \
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return INSN_REJECTED; \
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} \
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} while (0)
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__RISCV_INSN_FUNCS(system, 0x7f, 0x73);
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__RISCV_INSN_FUNCS(fence, 0x7f, 0x0f);
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#define RISCV_INSN_SET_SIMULATE(name, code) \
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do { \
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if (riscv_insn_is_##name(code)) { \
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api->handler = simulate_##name; \
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return INSN_GOOD_NO_SLOT; \
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} \
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} while (0)
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__RISCV_INSN_FUNCS(c_j, 0xe003, 0xa001);
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__RISCV_INSN_FUNCS(c_jr, 0xf07f, 0x8002);
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__RISCV_INSN_FUNCS(c_jal, 0xe003, 0x2001);
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__RISCV_INSN_FUNCS(c_jalr, 0xf07f, 0x9002);
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__RISCV_INSN_FUNCS(c_beqz, 0xe003, 0xc001);
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__RISCV_INSN_FUNCS(c_bnez, 0xe003, 0xe001);
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__RISCV_INSN_FUNCS(c_ebreak, 0xffff, 0x9002);
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__RISCV_INSN_FUNCS(auipc, 0x7f, 0x17);
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__RISCV_INSN_FUNCS(branch, 0x7f, 0x63);
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__RISCV_INSN_FUNCS(jal, 0x7f, 0x6f);
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__RISCV_INSN_FUNCS(jalr, 0x707f, 0x67);
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#endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
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