Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
221 lines
4.7 KiB
C
221 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Author: Egor Martovetsky <egor@pasemi.com>
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Driver for the PWRficient onchip NAND flash interface
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*/
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#undef DEBUG
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#define LBICTRL_LPCCTL_NR 0x00004000
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#define CLE_PIN_CTL 15
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#define ALE_PIN_CTL 14
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static unsigned int lpcctl;
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static struct mtd_info *pasemi_nand_mtd;
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static const char driver_name[] = "pasemi-nand";
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static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
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{
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while (len > 0x800) {
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memcpy_fromio(buf, chip->legacy.IO_ADDR_R, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_fromio(buf, chip->legacy.IO_ADDR_R, len);
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}
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static void pasemi_write_buf(struct nand_chip *chip, const u_char *buf,
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int len)
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{
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while (len > 0x800) {
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memcpy_toio(chip->legacy.IO_ADDR_R, buf, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_toio(chip->legacy.IO_ADDR_R, buf, len);
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}
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static void pasemi_hwcontrol(struct nand_chip *chip, int cmd,
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unsigned int ctrl)
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{
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
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else
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out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
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/* Push out posted writes */
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eieio();
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inl(lpcctl);
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}
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int pasemi_device_ready(struct nand_chip *chip)
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{
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return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
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}
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static int pasemi_nand_probe(struct platform_device *ofdev)
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{
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struct device *dev = &ofdev->dev;
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struct pci_dev *pdev;
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struct device_node *np = dev->of_node;
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struct resource res;
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struct nand_chip *chip;
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int err = 0;
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err = of_address_to_resource(np, 0, &res);
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if (err)
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return -EINVAL;
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/* We only support one device at the moment */
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if (pasemi_nand_mtd)
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return -ENODEV;
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dev_dbg(dev, "pasemi_nand at %pR\n", &res);
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/* Allocate memory for MTD device structure and private data */
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chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
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if (!chip) {
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err = -ENOMEM;
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goto out;
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}
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pasemi_nand_mtd = nand_to_mtd(chip);
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/* Link the private data with the MTD structure */
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pasemi_nand_mtd->dev.parent = dev;
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chip->legacy.IO_ADDR_R = of_iomap(np, 0);
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chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
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if (!chip->legacy.IO_ADDR_R) {
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err = -EIO;
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goto out_mtd;
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}
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pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
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if (!pdev) {
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err = -ENODEV;
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goto out_ior;
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}
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lpcctl = pci_resource_start(pdev, 0);
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pci_dev_put(pdev);
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if (!request_region(lpcctl, 4, driver_name)) {
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err = -EBUSY;
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goto out_ior;
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}
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chip->legacy.cmd_ctrl = pasemi_hwcontrol;
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chip->legacy.dev_ready = pasemi_device_ready;
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chip->legacy.read_buf = pasemi_read_buf;
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chip->legacy.write_buf = pasemi_write_buf;
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chip->legacy.chip_delay = 0;
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chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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/* Enable the following for a flash based bad block table */
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chip->bbt_options = NAND_BBT_USE_FLASH;
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/* Scan to find existence of the device */
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err = nand_scan(chip, 1);
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if (err)
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goto out_lpc;
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if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
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dev_err(dev, "Unable to register MTD device\n");
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err = -ENODEV;
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goto out_cleanup_nand;
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}
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dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
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lpcctl);
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return 0;
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out_cleanup_nand:
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nand_cleanup(chip);
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out_lpc:
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release_region(lpcctl, 4);
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out_ior:
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iounmap(chip->legacy.IO_ADDR_R);
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out_mtd:
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kfree(chip);
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out:
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return err;
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}
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static int pasemi_nand_remove(struct platform_device *ofdev)
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{
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struct nand_chip *chip;
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int ret;
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if (!pasemi_nand_mtd)
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return 0;
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chip = mtd_to_nand(pasemi_nand_mtd);
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/* Release resources, unregister device */
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ret = mtd_device_unregister(pasemi_nand_mtd);
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WARN_ON(ret);
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nand_cleanup(chip);
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release_region(lpcctl, 4);
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iounmap(chip->legacy.IO_ADDR_R);
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/* Free the MTD device structure */
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kfree(chip);
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pasemi_nand_mtd = NULL;
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return 0;
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}
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static const struct of_device_id pasemi_nand_match[] =
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{
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{
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.compatible = "pasemi,localbus-nand",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, pasemi_nand_match);
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static struct platform_driver pasemi_nand_driver =
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{
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.driver = {
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.name = driver_name,
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.of_match_table = pasemi_nand_match,
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},
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.probe = pasemi_nand_probe,
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.remove = pasemi_nand_remove,
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};
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module_platform_driver(pasemi_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
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MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");
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